ETRAX: Support timer count reads and correct frequencies.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6206 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
c38ac98da5
commit
ab86bb3b08
|
@ -75,15 +75,6 @@ struct fs_timer_t {
|
||||||
uint32_t r_masked_intr;
|
uint32_t r_masked_intr;
|
||||||
};
|
};
|
||||||
|
|
||||||
static uint32_t timer_rinvalid (void *opaque, target_phys_addr_t addr)
|
|
||||||
{
|
|
||||||
struct fs_timer_t *t = opaque;
|
|
||||||
CPUState *env = t->env;
|
|
||||||
cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n",
|
|
||||||
addr);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static uint32_t timer_readl (void *opaque, target_phys_addr_t addr)
|
static uint32_t timer_readl (void *opaque, target_phys_addr_t addr)
|
||||||
{
|
{
|
||||||
struct fs_timer_t *t = opaque;
|
struct fs_timer_t *t = opaque;
|
||||||
|
@ -91,9 +82,10 @@ static uint32_t timer_readl (void *opaque, target_phys_addr_t addr)
|
||||||
|
|
||||||
switch (addr) {
|
switch (addr) {
|
||||||
case R_TMR0_DATA:
|
case R_TMR0_DATA:
|
||||||
|
r = ptimer_get_count(t->ptimer_t0);
|
||||||
break;
|
break;
|
||||||
case R_TMR1_DATA:
|
case R_TMR1_DATA:
|
||||||
D(printf ("R_TMR1_DATA\n"));
|
r = ptimer_get_count(t->ptimer_t1);
|
||||||
break;
|
break;
|
||||||
case R_TIME:
|
case R_TIME:
|
||||||
r = qemu_get_clock(vm_clock) / 10;
|
r = qemu_get_clock(vm_clock) / 10;
|
||||||
|
@ -111,15 +103,6 @@ static uint32_t timer_readl (void *opaque, target_phys_addr_t addr)
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
|
||||||
timer_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value)
|
|
||||||
{
|
|
||||||
struct fs_timer_t *t = opaque;
|
|
||||||
CPUState *env = t->env;
|
|
||||||
cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n",
|
|
||||||
addr);
|
|
||||||
}
|
|
||||||
|
|
||||||
#define TIMER_SLOWDOWN 1
|
#define TIMER_SLOWDOWN 1
|
||||||
static void update_ctrl(struct fs_timer_t *t, int tnum)
|
static void update_ctrl(struct fs_timer_t *t, int tnum)
|
||||||
{
|
{
|
||||||
|
@ -155,7 +138,7 @@ static void update_ctrl(struct fs_timer_t *t, int tnum)
|
||||||
case 4: freq_hz = 29493000; break;
|
case 4: freq_hz = 29493000; break;
|
||||||
case 5: freq_hz = 32000000; break;
|
case 5: freq_hz = 32000000; break;
|
||||||
case 6: freq_hz = 32768000; break;
|
case 6: freq_hz = 32768000; break;
|
||||||
case 7: freq_hz = 100001000; break;
|
case 7: freq_hz = 100000000; break;
|
||||||
default:
|
default:
|
||||||
abort();
|
abort();
|
||||||
break;
|
break;
|
||||||
|
@ -163,8 +146,8 @@ static void update_ctrl(struct fs_timer_t *t, int tnum)
|
||||||
|
|
||||||
D(printf ("freq_hz=%d div=%d\n", freq_hz, div));
|
D(printf ("freq_hz=%d div=%d\n", freq_hz, div));
|
||||||
div = div * TIMER_SLOWDOWN;
|
div = div * TIMER_SLOWDOWN;
|
||||||
div >>= 10;
|
div /= 1000;
|
||||||
freq_hz >>= 10;
|
freq_hz /= 1000;
|
||||||
ptimer_set_freq(timer, freq_hz);
|
ptimer_set_freq(timer, freq_hz);
|
||||||
ptimer_set_limit(timer, div, 0);
|
ptimer_set_limit(timer, div, 0);
|
||||||
|
|
||||||
|
@ -309,14 +292,12 @@ timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
|
||||||
}
|
}
|
||||||
|
|
||||||
static CPUReadMemoryFunc *timer_read[] = {
|
static CPUReadMemoryFunc *timer_read[] = {
|
||||||
&timer_rinvalid,
|
NULL, NULL,
|
||||||
&timer_rinvalid,
|
|
||||||
&timer_readl,
|
&timer_readl,
|
||||||
};
|
};
|
||||||
|
|
||||||
static CPUWriteMemoryFunc *timer_write[] = {
|
static CPUWriteMemoryFunc *timer_write[] = {
|
||||||
&timer_winvalid,
|
NULL, NULL,
|
||||||
&timer_winvalid,
|
|
||||||
&timer_writel,
|
&timer_writel,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
Loading…
Reference in a new issue