dp8393x: put the DMA buffer in the state structure
Move it from the stack. It's only 24 bytes, and this simplifies the dp8393x_get()/ dp8393x_put() interface. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> Message-Id: <20191106112341.23735-2-laurent@vivier.eu>
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1cee80fa66
commit
af9f0be36c
105
hw/net/dp8393x.c
105
hw/net/dp8393x.c
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@ -171,6 +171,7 @@ typedef struct dp8393xState {
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/* Temporaries */
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uint8_t tx_buffer[0x10000];
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uint16_t data[12];
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int loopback_packet;
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/* Memory access */
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@ -224,26 +225,25 @@ static uint32_t dp8393x_wt(dp8393xState *s)
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return s->regs[SONIC_WT1] << 16 | s->regs[SONIC_WT0];
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}
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static uint16_t dp8393x_get(dp8393xState *s, int width, uint16_t *base,
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int offset)
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static uint16_t dp8393x_get(dp8393xState *s, int width, int offset)
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{
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uint16_t val;
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if (s->big_endian) {
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val = be16_to_cpu(base[offset * width + width - 1]);
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val = be16_to_cpu(s->data[offset * width + width - 1]);
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} else {
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val = le16_to_cpu(base[offset * width]);
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val = le16_to_cpu(s->data[offset * width]);
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}
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return val;
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}
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static void dp8393x_put(dp8393xState *s, int width, uint16_t *base, int offset,
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static void dp8393x_put(dp8393xState *s, int width, int offset,
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uint16_t val)
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{
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if (s->big_endian) {
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base[offset * width + width - 1] = cpu_to_be16(val);
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s->data[offset * width + width - 1] = cpu_to_be16(val);
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} else {
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base[offset * width] = cpu_to_le16(val);
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s->data[offset * width] = cpu_to_le16(val);
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}
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}
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@ -267,7 +267,6 @@ static void dp8393x_update_irq(dp8393xState *s)
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static void dp8393x_do_load_cam(dp8393xState *s)
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{
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uint16_t data[8];
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int width, size;
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uint16_t index = 0;
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@ -277,13 +276,13 @@ static void dp8393x_do_load_cam(dp8393xState *s)
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while (s->regs[SONIC_CDC] & 0x1f) {
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/* Fill current entry */
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address_space_rw(&s->as, dp8393x_cdp(s),
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)data, size, 0);
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s->cam[index][0] = dp8393x_get(s, width, data, 1) & 0xff;
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s->cam[index][1] = dp8393x_get(s, width, data, 1) >> 8;
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s->cam[index][2] = dp8393x_get(s, width, data, 2) & 0xff;
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s->cam[index][3] = dp8393x_get(s, width, data, 2) >> 8;
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s->cam[index][4] = dp8393x_get(s, width, data, 3) & 0xff;
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s->cam[index][5] = dp8393x_get(s, width, data, 3) >> 8;
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 0);
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s->cam[index][0] = dp8393x_get(s, width, 1) & 0xff;
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s->cam[index][1] = dp8393x_get(s, width, 1) >> 8;
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s->cam[index][2] = dp8393x_get(s, width, 2) & 0xff;
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s->cam[index][3] = dp8393x_get(s, width, 2) >> 8;
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s->cam[index][4] = dp8393x_get(s, width, 3) & 0xff;
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s->cam[index][5] = dp8393x_get(s, width, 3) >> 8;
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DPRINTF("load cam[%d] with %02x%02x%02x%02x%02x%02x\n", index,
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s->cam[index][0], s->cam[index][1], s->cam[index][2],
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s->cam[index][3], s->cam[index][4], s->cam[index][5]);
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@ -295,8 +294,8 @@ static void dp8393x_do_load_cam(dp8393xState *s)
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/* Read CAM enable */
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address_space_rw(&s->as, dp8393x_cdp(s),
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)data, size, 0);
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s->regs[SONIC_CE] = dp8393x_get(s, width, data, 0);
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 0);
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s->regs[SONIC_CE] = dp8393x_get(s, width, 0);
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DPRINTF("load cam done. cam enable mask 0x%04x\n", s->regs[SONIC_CE]);
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/* Done */
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@ -307,20 +306,19 @@ static void dp8393x_do_load_cam(dp8393xState *s)
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static void dp8393x_do_read_rra(dp8393xState *s)
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{
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uint16_t data[8];
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int width, size;
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/* Read memory */
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width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1;
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size = sizeof(uint16_t) * 4 * width;
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address_space_rw(&s->as, dp8393x_rrp(s),
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)data, size, 0);
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 0);
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/* Update SONIC registers */
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s->regs[SONIC_CRBA0] = dp8393x_get(s, width, data, 0);
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s->regs[SONIC_CRBA1] = dp8393x_get(s, width, data, 1);
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s->regs[SONIC_RBWC0] = dp8393x_get(s, width, data, 2);
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s->regs[SONIC_RBWC1] = dp8393x_get(s, width, data, 3);
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s->regs[SONIC_CRBA0] = dp8393x_get(s, width, 0);
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s->regs[SONIC_CRBA1] = dp8393x_get(s, width, 1);
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s->regs[SONIC_RBWC0] = dp8393x_get(s, width, 2);
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s->regs[SONIC_RBWC1] = dp8393x_get(s, width, 3);
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DPRINTF("CRBA0/1: 0x%04x/0x%04x, RBWC0/1: 0x%04x/0x%04x\n",
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s->regs[SONIC_CRBA0], s->regs[SONIC_CRBA1],
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s->regs[SONIC_RBWC0], s->regs[SONIC_RBWC1]);
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@ -417,7 +415,6 @@ static void dp8393x_do_receiver_disable(dp8393xState *s)
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static void dp8393x_do_transmit_packets(dp8393xState *s)
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{
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NetClientState *nc = qemu_get_queue(s->nic);
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uint16_t data[12];
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int width, size;
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int tx_len, len;
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uint16_t i;
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@ -429,18 +426,17 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
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size = sizeof(uint16_t) * 6 * width;
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s->regs[SONIC_TTDA] = s->regs[SONIC_CTDA];
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DPRINTF("Transmit packet at %08x\n", dp8393x_ttda(s));
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address_space_rw(&s->as,
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dp8393x_ttda(s) + sizeof(uint16_t) * width,
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)data, size, 0);
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address_space_rw(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * width,
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 0);
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tx_len = 0;
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/* Update registers */
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s->regs[SONIC_TCR] = dp8393x_get(s, width, data, 0) & 0xf000;
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s->regs[SONIC_TPS] = dp8393x_get(s, width, data, 1);
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s->regs[SONIC_TFC] = dp8393x_get(s, width, data, 2);
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s->regs[SONIC_TSA0] = dp8393x_get(s, width, data, 3);
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s->regs[SONIC_TSA1] = dp8393x_get(s, width, data, 4);
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s->regs[SONIC_TFS] = dp8393x_get(s, width, data, 5);
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s->regs[SONIC_TCR] = dp8393x_get(s, width, 0) & 0xf000;
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s->regs[SONIC_TPS] = dp8393x_get(s, width, 1);
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s->regs[SONIC_TFC] = dp8393x_get(s, width, 2);
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s->regs[SONIC_TSA0] = dp8393x_get(s, width, 3);
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s->regs[SONIC_TSA1] = dp8393x_get(s, width, 4);
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s->regs[SONIC_TFS] = dp8393x_get(s, width, 5);
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/* Handle programmable interrupt */
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if (s->regs[SONIC_TCR] & SONIC_TCR_PINT) {
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@ -465,10 +461,10 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
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size = sizeof(uint16_t) * 3 * width;
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address_space_rw(&s->as,
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dp8393x_ttda(s) + sizeof(uint16_t) * (4 + 3 * i) * width,
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)data, size, 0);
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s->regs[SONIC_TSA0] = dp8393x_get(s, width, data, 0);
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s->regs[SONIC_TSA1] = dp8393x_get(s, width, data, 1);
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s->regs[SONIC_TFS] = dp8393x_get(s, width, data, 2);
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 0);
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s->regs[SONIC_TSA0] = dp8393x_get(s, width, 0);
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s->regs[SONIC_TSA1] = dp8393x_get(s, width, 1);
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s->regs[SONIC_TFS] = dp8393x_get(s, width, 2);
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}
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}
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@ -495,12 +491,12 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
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s->regs[SONIC_TCR] |= SONIC_TCR_PTX;
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/* Write status */
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dp8393x_put(s, width, data, 0,
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dp8393x_put(s, width, 0,
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s->regs[SONIC_TCR] & 0x0fff); /* status */
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size = sizeof(uint16_t) * width;
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address_space_rw(&s->as,
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dp8393x_ttda(s),
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)data, size, 1);
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 1);
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if (!(s->regs[SONIC_CR] & SONIC_CR_HTX)) {
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/* Read footer of packet */
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@ -509,9 +505,9 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
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dp8393x_ttda(s) +
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sizeof(uint16_t) *
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(4 + 3 * s->regs[SONIC_TFC]) * width,
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)data, size, 0);
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s->regs[SONIC_CTDA] = dp8393x_get(s, width, data, 0) & ~0x1;
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if (dp8393x_get(s, width, data, 0) & 0x1) {
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 0);
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s->regs[SONIC_CTDA] = dp8393x_get(s, width, 0) & ~0x1;
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if (dp8393x_get(s, width, 0) & 0x1) {
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/* EOL detected */
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break;
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}
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@ -748,7 +744,6 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
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size_t size)
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{
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dp8393xState *s = qemu_get_nic_opaque(nc);
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uint16_t data[10];
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int packet_type;
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uint32_t available, address;
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int width, rx_len = size;
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@ -773,8 +768,8 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
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size = sizeof(uint16_t) * 1 * width;
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address = dp8393x_crda(s) + sizeof(uint16_t) * 5 * width;
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address_space_rw(&s->as, address, MEMTXATTRS_UNSPECIFIED,
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(uint8_t *)data, size, 0);
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if (dp8393x_get(s, width, data, 0) & 0x1) {
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(uint8_t *)s->data, size, 0);
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if (dp8393x_get(s, width, 0) & 0x1) {
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/* Still EOL ; stop reception */
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return -1;
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} else {
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@ -818,27 +813,27 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
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/* Write status to memory */
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DPRINTF("Write status at %08x\n", dp8393x_crda(s));
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dp8393x_put(s, width, data, 0, s->regs[SONIC_RCR]); /* status */
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dp8393x_put(s, width, data, 1, rx_len); /* byte count */
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dp8393x_put(s, width, data, 2, s->regs[SONIC_TRBA0]); /* pkt_ptr0 */
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dp8393x_put(s, width, data, 3, s->regs[SONIC_TRBA1]); /* pkt_ptr1 */
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dp8393x_put(s, width, data, 4, s->regs[SONIC_RSC]); /* seq_no */
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dp8393x_put(s, width, 0, s->regs[SONIC_RCR]); /* status */
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dp8393x_put(s, width, 1, rx_len); /* byte count */
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dp8393x_put(s, width, 2, s->regs[SONIC_TRBA0]); /* pkt_ptr0 */
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dp8393x_put(s, width, 3, s->regs[SONIC_TRBA1]); /* pkt_ptr1 */
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dp8393x_put(s, width, 4, s->regs[SONIC_RSC]); /* seq_no */
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size = sizeof(uint16_t) * 5 * width;
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address_space_rw(&s->as, dp8393x_crda(s),
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)data, size, 1);
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 1);
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/* Move to next descriptor */
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size = sizeof(uint16_t) * width;
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address_space_rw(&s->as, dp8393x_crda(s) + sizeof(uint16_t) * 5 * width,
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)data, size, 0);
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s->regs[SONIC_LLFA] = dp8393x_get(s, width, data, 0);
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 0);
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s->regs[SONIC_LLFA] = dp8393x_get(s, width, 0);
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if (s->regs[SONIC_LLFA] & 0x1) {
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/* EOL detected */
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s->regs[SONIC_ISR] |= SONIC_ISR_RDE;
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} else {
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dp8393x_put(s, width, data, 0, 0); /* in_use */
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dp8393x_put(s, width, 0, 0); /* in_use */
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address_space_rw(&s->as, dp8393x_crda(s) + sizeof(uint16_t) * 6 * width,
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)data, sizeof(uint16_t), 1);
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MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, sizeof(uint16_t), 1);
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s->regs[SONIC_CRDA] = s->regs[SONIC_LLFA];
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s->regs[SONIC_ISR] |= SONIC_ISR_PKTRX;
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s->regs[SONIC_RSC] = (s->regs[SONIC_RSC] & 0xff00) | (((s->regs[SONIC_RSC] & 0x00ff) + 1) & 0x00ff);
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