xtensa fixes for 3.1:
- fix register counting logic for linux-user gdbserver; - provide default memory sizes for XTFPGA boards; - add missing xtensa patterns to MAINTAINTERS. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEK2eFS5jlMn3N6xfYUfnMkfg/oEQFAlv7K0oTHGpjbXZia2Jj QGdtYWlsLmNvbQAKCRBR+cyR+D+gRDWrD/4yPoHniOxe/1tnldviJVChJsE7YjGD S1J/JOIxSqH/fdHm7t3n4lQU8VvdKu7O8XEgscFRa2tnSKnERrlOsjJJCQMVPk7x gkSBgdmfxJtfVVK3uktU+nNVuecx6jPEOZhNgWPFv5WZKUUvmdaAJ4DRHQx1PjoO PGPjqcDJ0nQMteqDDdrnL3Q/Hu0lMDSXU4fBdaVw4fWTETOwQdf6nMma9iGP2/Eq ZqTigrHX617JspqVXvTLwJ5C4hg2UEKpS8QG8p5t91cD2QBT3j5Curylku2MWeLS eFKKZs/9sxskydlLs3RJM1xslWihYz1UDg2Gz7o3MbceacYuVAH7wcWeXx0GiNQ6 enU3IVG8lOBy6LNZZVSwwFtUdbaFMG1ZzGOh5yAdH15SyKsxHqxyV4iy2MxfU7a8 Ipc+AjgPHaOLwpRe/19MdOULRkMAyUWhd6nfK+D3VaLX3paB+FKNhXMpR9g5wr+8 q6jwCuz0ncS4gHKTekCaYceJJ5XV3ie6oDQrr0SLRZZpddEjiWybHS/5w+EZzeUE xankg3zqpLTPQrIPusOlmtRPYHKcYQuU3lzcRt7emvIKj5ofTxw0hFfX7X3a+UPp ENO89RNBA473XV6ovl6OzK84rKeGSVOVIdBouRxWROV55OcWPHamFgaT2BuSXr7z tZwM6v6xMsTAyw== =P9x7 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/xtensa/tags/20181125-xtensa' into staging xtensa fixes for 3.1: - fix register counting logic for linux-user gdbserver; - provide default memory sizes for XTFPGA boards; - add missing xtensa patterns to MAINTAINTERS. # gpg: Signature made Sun 25 Nov 2018 23:07:54 GMT # gpg: using RSA key 51F9CC91F83FA044 # gpg: Good signature from "Max Filippov <filippov@cadence.com>" # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20181125-xtensa: MAINTAINERS: add missing xtensa patterns target/xtensa: xtfpga: provide default memory sizes target/xtensa: drop num_[core_]regs from dc232b/dc233c configs target/xtensa: gdbstub fix register counting Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
b05730a876
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@ -311,6 +311,8 @@ F: target/xtensa/
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F: hw/xtensa/
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F: tests/tcg/xtensa/
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F: disas/xtensa.c
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F: include/hw/xtensa/xtensa-isa.h
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F: default-configs/xtensa*.mak
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TriCore
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M: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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@ -446,6 +446,8 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
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}
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}
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#define XTFPGA_MMU_RESERVED_MEMORY_SIZE (128 * MiB)
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static const hwaddr xtfpga_mmu_io[2] = {
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0xf0000000,
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};
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@ -568,6 +570,7 @@ static void xtfpga_lx60_class_init(ObjectClass *oc, void *data)
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mc->init = xtfpga_lx60_init;
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mc->max_cpus = 4;
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mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
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mc->default_ram_size = 64 * MiB;
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}
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static const TypeInfo xtfpga_lx60_type = {
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@ -584,6 +587,7 @@ static void xtfpga_lx60_nommu_class_init(ObjectClass *oc, void *data)
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mc->init = xtfpga_lx60_nommu_init;
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mc->max_cpus = 4;
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mc->default_cpu_type = XTENSA_DEFAULT_CPU_NOMMU_TYPE;
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mc->default_ram_size = 64 * MiB;
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}
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static const TypeInfo xtfpga_lx60_nommu_type = {
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@ -600,6 +604,7 @@ static void xtfpga_lx200_class_init(ObjectClass *oc, void *data)
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mc->init = xtfpga_lx200_init;
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mc->max_cpus = 4;
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mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
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mc->default_ram_size = 96 * MiB;
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}
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static const TypeInfo xtfpga_lx200_type = {
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@ -616,6 +621,7 @@ static void xtfpga_lx200_nommu_class_init(ObjectClass *oc, void *data)
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mc->init = xtfpga_lx200_nommu_init;
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mc->max_cpus = 4;
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mc->default_cpu_type = XTENSA_DEFAULT_CPU_NOMMU_TYPE;
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mc->default_ram_size = 96 * MiB;
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}
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static const TypeInfo xtfpga_lx200_nommu_type = {
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@ -632,6 +638,7 @@ static void xtfpga_ml605_class_init(ObjectClass *oc, void *data)
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mc->init = xtfpga_ml605_init;
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mc->max_cpus = 4;
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mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
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mc->default_ram_size = 512 * MiB - XTFPGA_MMU_RESERVED_MEMORY_SIZE;
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}
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static const TypeInfo xtfpga_ml605_type = {
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@ -648,6 +655,7 @@ static void xtfpga_ml605_nommu_class_init(ObjectClass *oc, void *data)
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mc->init = xtfpga_ml605_nommu_init;
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mc->max_cpus = 4;
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mc->default_cpu_type = XTENSA_DEFAULT_CPU_NOMMU_TYPE;
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mc->default_ram_size = 256 * MiB;
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}
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static const TypeInfo xtfpga_ml605_nommu_type = {
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@ -664,6 +672,7 @@ static void xtfpga_kc705_class_init(ObjectClass *oc, void *data)
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mc->init = xtfpga_kc705_init;
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mc->max_cpus = 4;
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mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
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mc->default_ram_size = 1 * GiB - XTFPGA_MMU_RESERVED_MEMORY_SIZE;
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}
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static const TypeInfo xtfpga_kc705_type = {
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@ -680,6 +689,7 @@ static void xtfpga_kc705_nommu_class_init(ObjectClass *oc, void *data)
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mc->init = xtfpga_kc705_nommu_init;
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mc->max_cpus = 4;
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mc->default_cpu_type = XTENSA_DEFAULT_CPU_NOMMU_TYPE;
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mc->default_ram_size = 256 * MiB;
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}
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static const TypeInfo xtfpga_kc705_nommu_type = {
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@ -40,8 +40,6 @@
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static XtensaConfig dc232b __attribute__((unused)) = {
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.name = "dc232b",
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.gdb_regmap = {
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.num_regs = 120,
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.num_core_regs = 52,
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.reg = {
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#include "core-dc232b/gdb-config.inc.c"
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}
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@ -259,3 +259,4 @@
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0, 0, 0, 0, 0, 0)
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XTREG(119, 476, 32, 4, 4, 0x000f, 0x0006, -2, 8, 0x0100, a15,
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0, 0, 0, 0, 0, 0)
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XTREG_END
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@ -40,8 +40,6 @@
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static XtensaConfig dc233c __attribute__((unused)) = {
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.name = "dc233c",
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.gdb_regmap = {
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.num_regs = 121,
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.num_core_regs = 52,
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.reg = {
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#include "core-dc233c/gdb-config.inc.c"
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}
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@ -143,3 +143,4 @@ XTREG(117, 468, 32, 4, 4, 0x000c, 0x0006, -2, 8, 0x0100, a12, 0, 0, 0, 0
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XTREG(118, 472, 32, 4, 4, 0x000d, 0x0006, -2, 8, 0x0100, a13, 0, 0, 0, 0, 0, 0)
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XTREG(119, 476, 32, 4, 4, 0x000e, 0x0006, -2, 8, 0x0100, a14, 0, 0, 0, 0, 0, 0)
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XTREG(120, 480, 32, 4, 4, 0x000f, 0x0006, -2, 8, 0x0100, a15, 0, 0, 0, 0, 0, 0)
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XTREG_END
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@ -45,15 +45,20 @@ void xtensa_count_regs(const XtensaConfig *config,
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unsigned *n_regs, unsigned *n_core_regs)
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{
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unsigned i;
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bool count_core_regs = true;
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for (i = 0; config->gdb_regmap.reg[i].targno >= 0; ++i) {
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if (config->gdb_regmap.reg[i].type != xtRegisterTypeTieState &&
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config->gdb_regmap.reg[i].type != xtRegisterTypeMapped &&
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config->gdb_regmap.reg[i].type != xtRegisterTypeUnmapped) {
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++*n_regs;
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if ((config->gdb_regmap.reg[i].flags &
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XTENSA_REGISTER_FLAGS_PRIVILEGED) == 0) {
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++*n_core_regs;
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if (count_core_regs) {
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if ((config->gdb_regmap.reg[i].flags &
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XTENSA_REGISTER_FLAGS_PRIVILEGED) == 0) {
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++*n_core_regs;
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} else {
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count_core_regs = false;
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}
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}
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}
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}
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