target/mips: convert to DisasJumpType
Notes: - BS_EXCP in generate_exception_err and after hen_helper_wait becomes DISAS_NORETURN, because we do not return after raising an exception. - Some uses of BS_EXCP are misleading in that they're used only as a "not BS_STOP" exit condition, i.e. they have nothing to do with an actual exception. For those cases, define and use DISAS_EXIT, which is clearer. With this and the above change, BS_EXCP goes away completely. - fix a comment typo (s/intetrupt/interrupt/). Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Yongbok Kim <yongbok.kim@mips.com> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
cd314a7d01
commit
b28425babc
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@ -36,6 +36,7 @@
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#include "target/mips/trace.h"
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#include "trace-tcg.h"
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#include "exec/translator.h"
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#include "exec/log.h"
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#define MIPS_DEBUG_DISAS 0
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@ -1439,7 +1440,7 @@ typedef struct DisasContext {
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int mem_idx;
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TCGMemOp default_tcg_memop_mask;
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uint32_t hflags, saved_hflags;
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int bstate;
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DisasJumpType is_jmp;
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target_ulong btarget;
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bool ulri;
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int kscrexist;
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@ -1460,13 +1461,8 @@ typedef struct DisasContext {
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bool abs2008;
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} DisasContext;
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enum {
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BS_NONE = 0, /* We go out of the TB without reaching a branch or an
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* exception condition */
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BS_STOP = 1, /* We want to stop translation for any reason */
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BS_BRANCH = 2, /* We reached a branch condition */
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BS_EXCP = 3, /* We reached an exception condition */
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};
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#define DISAS_STOP DISAS_TARGET_0
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#define DISAS_EXIT DISAS_TARGET_1
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static const char * const regnames[] = {
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"r0", "at", "v0", "v1", "a0", "a1", "a2", "a3",
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@ -1639,7 +1635,7 @@ static inline void generate_exception_err(DisasContext *ctx, int excp, int err)
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gen_helper_raise_exception_err(cpu_env, texcp, terr);
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tcg_temp_free_i32(terr);
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tcg_temp_free_i32(texcp);
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ctx->bstate = BS_EXCP;
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ctx->is_jmp = DISAS_NORETURN;
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}
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static inline void generate_exception(DisasContext *ctx, int excp)
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@ -5334,10 +5330,10 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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gen_io_end();
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}
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/* Break the TB to be able to take timer interrupts immediately
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after reading count. BS_STOP isn't sufficient, we need to ensure
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we break completely out of translated code. */
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after reading count. DISAS_STOP isn't sufficient, we need to
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ensure we break completely out of translated code. */
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gen_save_pc(ctx->pc + 4);
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ctx->bstate = BS_EXCP;
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ctx->is_jmp = DISAS_EXIT;
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rn = "Count";
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break;
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/* 6,7 are implementation dependent */
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@ -5905,7 +5901,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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check_insn(ctx, ISA_MIPS32R2);
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gen_helper_mtc0_pagegrain(cpu_env, arg);
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rn = "PageGrain";
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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break;
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case 2:
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CP0_CHECK(ctx->sc);
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@ -5966,7 +5962,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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case 0:
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check_insn(ctx, ISA_MIPS32R2);
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gen_helper_mtc0_hwrena(cpu_env, arg);
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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rn = "HWREna";
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break;
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default:
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@ -6028,30 +6024,30 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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case 0:
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save_cpu_state(ctx, 1);
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gen_helper_mtc0_status(cpu_env, arg);
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/* BS_STOP isn't good enough here, hflags may have changed. */
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/* DISAS_STOP isn't good enough here, hflags may have changed. */
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gen_save_pc(ctx->pc + 4);
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ctx->bstate = BS_EXCP;
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ctx->is_jmp = DISAS_EXIT;
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rn = "Status";
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break;
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case 1:
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check_insn(ctx, ISA_MIPS32R2);
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gen_helper_mtc0_intctl(cpu_env, arg);
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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rn = "IntCtl";
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break;
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case 2:
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check_insn(ctx, ISA_MIPS32R2);
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gen_helper_mtc0_srsctl(cpu_env, arg);
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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rn = "SRSCtl";
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break;
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case 3:
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check_insn(ctx, ISA_MIPS32R2);
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gen_mtc0_store32(arg, offsetof(CPUMIPSState, CP0_SRSMap));
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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rn = "SRSMap";
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break;
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default:
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@ -6063,11 +6059,11 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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case 0:
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save_cpu_state(ctx, 1);
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gen_helper_mtc0_cause(cpu_env, arg);
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/* Stop translation as we may have triggered an interrupt. BS_STOP
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* isn't sufficient, we need to ensure we break out of translated
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* code to check for pending interrupts. */
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/* Stop translation as we may have triggered an interrupt.
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* DISAS_STOP isn't sufficient, we need to ensure we break out of
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* translated code to check for pending interrupts. */
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gen_save_pc(ctx->pc + 4);
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ctx->bstate = BS_EXCP;
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ctx->is_jmp = DISAS_EXIT;
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rn = "Cause";
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break;
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default:
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@ -6105,7 +6101,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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gen_helper_mtc0_config0(cpu_env, arg);
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rn = "Config";
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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break;
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case 1:
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/* ignored, read only */
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@ -6115,24 +6111,24 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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gen_helper_mtc0_config2(cpu_env, arg);
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rn = "Config2";
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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break;
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case 3:
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gen_helper_mtc0_config3(cpu_env, arg);
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rn = "Config3";
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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break;
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case 4:
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gen_helper_mtc0_config4(cpu_env, arg);
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rn = "Config4";
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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break;
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case 5:
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gen_helper_mtc0_config5(cpu_env, arg);
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rn = "Config5";
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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break;
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/* 6,7 are implementation dependent */
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case 6:
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@ -6221,35 +6217,35 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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switch (sel) {
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case 0:
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gen_helper_mtc0_debug(cpu_env, arg); /* EJTAG support */
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/* BS_STOP isn't good enough here, hflags may have changed. */
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/* DISAS_STOP isn't good enough here, hflags may have changed. */
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gen_save_pc(ctx->pc + 4);
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ctx->bstate = BS_EXCP;
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ctx->is_jmp = DISAS_EXIT;
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rn = "Debug";
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break;
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case 1:
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// gen_helper_mtc0_tracecontrol(cpu_env, arg); /* PDtrace support */
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rn = "TraceControl";
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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goto cp0_unimplemented;
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case 2:
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// gen_helper_mtc0_tracecontrol2(cpu_env, arg); /* PDtrace support */
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rn = "TraceControl2";
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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goto cp0_unimplemented;
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case 3:
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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// gen_helper_mtc0_usertracedata(cpu_env, arg); /* PDtrace support */
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rn = "UserTraceData";
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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goto cp0_unimplemented;
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case 4:
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// gen_helper_mtc0_tracebpc(cpu_env, arg); /* PDtrace support */
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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rn = "TraceBPC";
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goto cp0_unimplemented;
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default:
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@ -6309,7 +6305,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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switch (sel) {
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case 0:
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gen_helper_mtc0_errctl(cpu_env, arg);
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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rn = "ErrCtl";
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break;
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default:
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@ -6402,10 +6398,10 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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/* For simplicity assume that all writes can cause interrupts. */
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if (tb_cflags(ctx->tb) & CF_USE_ICOUNT) {
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gen_io_end();
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/* BS_STOP isn't sufficient, we need to ensure we break out of
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/* DISAS_STOP isn't sufficient, we need to ensure we break out of
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* translated code to check for pending interrupts. */
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gen_save_pc(ctx->pc + 4);
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ctx->bstate = BS_EXCP;
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ctx->is_jmp = DISAS_EXIT;
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}
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return;
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@ -6686,10 +6682,10 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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gen_io_end();
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}
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/* Break the TB to be able to take timer interrupts immediately
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after reading count. BS_STOP isn't sufficient, we need to ensure
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we break completely out of translated code. */
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after reading count. DISAS_STOP isn't sufficient, we need to
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ensure we break completely out of translated code. */
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gen_save_pc(ctx->pc + 4);
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ctx->bstate = BS_EXCP;
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ctx->is_jmp = DISAS_EXIT;
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rn = "Count";
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break;
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/* 6,7 are implementation dependent */
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@ -7301,7 +7297,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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case 0:
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check_insn(ctx, ISA_MIPS32R2);
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gen_helper_mtc0_hwrena(cpu_env, arg);
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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rn = "HWREna";
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break;
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default:
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@ -7337,7 +7333,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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goto cp0_unimplemented;
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}
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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break;
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case 10:
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switch (sel) {
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@ -7360,37 +7356,37 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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goto cp0_unimplemented;
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}
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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break;
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case 12:
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switch (sel) {
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case 0:
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save_cpu_state(ctx, 1);
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gen_helper_mtc0_status(cpu_env, arg);
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/* BS_STOP isn't good enough here, hflags may have changed. */
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/* DISAS_STOP isn't good enough here, hflags may have changed. */
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gen_save_pc(ctx->pc + 4);
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ctx->bstate = BS_EXCP;
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ctx->is_jmp = DISAS_EXIT;
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rn = "Status";
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break;
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case 1:
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check_insn(ctx, ISA_MIPS32R2);
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gen_helper_mtc0_intctl(cpu_env, arg);
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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rn = "IntCtl";
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break;
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case 2:
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check_insn(ctx, ISA_MIPS32R2);
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gen_helper_mtc0_srsctl(cpu_env, arg);
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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rn = "SRSCtl";
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break;
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case 3:
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check_insn(ctx, ISA_MIPS32R2);
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gen_mtc0_store32(arg, offsetof(CPUMIPSState, CP0_SRSMap));
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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rn = "SRSMap";
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break;
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default:
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@ -7402,11 +7398,11 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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case 0:
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save_cpu_state(ctx, 1);
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gen_helper_mtc0_cause(cpu_env, arg);
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/* Stop translation as we may have triggered an intetrupt. BS_STOP
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* isn't sufficient, we need to ensure we break out of translated
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* code to check for pending interrupts. */
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/* Stop translation as we may have triggered an interrupt.
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* DISAS_STOP isn't sufficient, we need to ensure we break out of
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* translated code to check for pending interrupts. */
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gen_save_pc(ctx->pc + 4);
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ctx->bstate = BS_EXCP;
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ctx->is_jmp = DISAS_EXIT;
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rn = "Cause";
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break;
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default:
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@ -7444,7 +7440,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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gen_helper_mtc0_config0(cpu_env, arg);
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rn = "Config";
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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break;
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case 1:
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/* ignored, read only */
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@ -7454,13 +7450,13 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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gen_helper_mtc0_config2(cpu_env, arg);
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rn = "Config2";
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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break;
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case 3:
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gen_helper_mtc0_config3(cpu_env, arg);
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rn = "Config3";
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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break;
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case 4:
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/* currently ignored */
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@ -7470,7 +7466,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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gen_helper_mtc0_config5(cpu_env, arg);
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rn = "Config5";
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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break;
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/* 6,7 are implementation dependent */
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default:
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@ -7549,33 +7545,33 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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switch (sel) {
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case 0:
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gen_helper_mtc0_debug(cpu_env, arg); /* EJTAG support */
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/* BS_STOP isn't good enough here, hflags may have changed. */
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/* DISAS_STOP isn't good enough here, hflags may have changed. */
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gen_save_pc(ctx->pc + 4);
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ctx->bstate = BS_EXCP;
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ctx->is_jmp = DISAS_EXIT;
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rn = "Debug";
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break;
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case 1:
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// gen_helper_mtc0_tracecontrol(cpu_env, arg); /* PDtrace support */
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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rn = "TraceControl";
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goto cp0_unimplemented;
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case 2:
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// gen_helper_mtc0_tracecontrol2(cpu_env, arg); /* PDtrace support */
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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rn = "TraceControl2";
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goto cp0_unimplemented;
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case 3:
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// gen_helper_mtc0_usertracedata(cpu_env, arg); /* PDtrace support */
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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rn = "UserTraceData";
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goto cp0_unimplemented;
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case 4:
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// gen_helper_mtc0_tracebpc(cpu_env, arg); /* PDtrace support */
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/* Stop translation as we may have switched the execution mode */
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ctx->bstate = BS_STOP;
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ctx->is_jmp = DISAS_STOP;
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||||
rn = "TraceBPC";
|
||||
goto cp0_unimplemented;
|
||||
default:
|
||||
|
@ -7635,7 +7631,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
|
|||
switch (sel) {
|
||||
case 0:
|
||||
gen_helper_mtc0_errctl(cpu_env, arg);
|
||||
ctx->bstate = BS_STOP;
|
||||
ctx->is_jmp = DISAS_STOP;
|
||||
rn = "ErrCtl";
|
||||
break;
|
||||
default:
|
||||
|
@ -7728,10 +7724,10 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
|
|||
/* For simplicity assume that all writes can cause interrupts. */
|
||||
if (tb_cflags(ctx->tb) & CF_USE_ICOUNT) {
|
||||
gen_io_end();
|
||||
/* BS_STOP isn't sufficient, we need to ensure we break out of
|
||||
/* DISAS_STOP isn't sufficient, we need to ensure we break out of
|
||||
* translated code to check for pending interrupts. */
|
||||
gen_save_pc(ctx->pc + 4);
|
||||
ctx->bstate = BS_EXCP;
|
||||
ctx->is_jmp = DISAS_EXIT;
|
||||
}
|
||||
return;
|
||||
|
||||
|
@ -8142,7 +8138,7 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
|
|||
tcg_temp_free_i32(fs_tmp);
|
||||
}
|
||||
/* Stop translation as we may have changed hflags */
|
||||
ctx->bstate = BS_STOP;
|
||||
ctx->is_jmp = DISAS_STOP;
|
||||
break;
|
||||
/* COP2: Not implemented. */
|
||||
case 4:
|
||||
|
@ -8301,7 +8297,7 @@ static void gen_cp0 (CPUMIPSState *env, DisasContext *ctx, uint32_t opc, int rt,
|
|||
check_insn(ctx, ISA_MIPS2);
|
||||
gen_helper_eret(cpu_env);
|
||||
}
|
||||
ctx->bstate = BS_EXCP;
|
||||
ctx->is_jmp = DISAS_EXIT;
|
||||
}
|
||||
break;
|
||||
case OPC_DERET:
|
||||
|
@ -8316,7 +8312,7 @@ static void gen_cp0 (CPUMIPSState *env, DisasContext *ctx, uint32_t opc, int rt,
|
|||
generate_exception_end(ctx, EXCP_RI);
|
||||
} else {
|
||||
gen_helper_deret(cpu_env);
|
||||
ctx->bstate = BS_EXCP;
|
||||
ctx->is_jmp = DISAS_EXIT;
|
||||
}
|
||||
break;
|
||||
case OPC_WAIT:
|
||||
|
@ -8331,7 +8327,7 @@ static void gen_cp0 (CPUMIPSState *env, DisasContext *ctx, uint32_t opc, int rt,
|
|||
save_cpu_state(ctx, 1);
|
||||
ctx->pc -= 4;
|
||||
gen_helper_wait(cpu_env);
|
||||
ctx->bstate = BS_EXCP;
|
||||
ctx->is_jmp = DISAS_NORETURN;
|
||||
break;
|
||||
default:
|
||||
die:
|
||||
|
@ -8756,7 +8752,7 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
|
|||
tcg_temp_free_i32(fs_tmp);
|
||||
}
|
||||
/* Stop translation as we may have changed hflags */
|
||||
ctx->bstate = BS_STOP;
|
||||
ctx->is_jmp = DISAS_STOP;
|
||||
break;
|
||||
#if defined(TARGET_MIPS64)
|
||||
case OPC_DMFC1:
|
||||
|
@ -10764,10 +10760,10 @@ static void gen_rdhwr(DisasContext *ctx, int rt, int rd, int sel)
|
|||
}
|
||||
gen_store_gpr(t0, rt);
|
||||
/* Break the TB to be able to take timer interrupts immediately
|
||||
after reading count. BS_STOP isn't sufficient, we need to ensure
|
||||
after reading count. DISAS_STOP isn't sufficient, we need to ensure
|
||||
we break completely out of translated code. */
|
||||
gen_save_pc(ctx->pc + 4);
|
||||
ctx->bstate = BS_EXCP;
|
||||
ctx->is_jmp = DISAS_EXIT;
|
||||
break;
|
||||
case 3:
|
||||
gen_helper_rdhwr_ccres(t0, cpu_env);
|
||||
|
@ -10817,7 +10813,7 @@ static void gen_rdhwr(DisasContext *ctx, int rt, int rd, int sel)
|
|||
static inline void clear_branch_hflags(DisasContext *ctx)
|
||||
{
|
||||
ctx->hflags &= ~MIPS_HFLAG_BMASK;
|
||||
if (ctx->bstate == BS_NONE) {
|
||||
if (ctx->is_jmp == DISAS_NEXT) {
|
||||
save_cpu_state(ctx, 0);
|
||||
} else {
|
||||
/* it is not safe to save ctx->hflags as hflags may be changed
|
||||
|
@ -10832,7 +10828,7 @@ static void gen_branch(DisasContext *ctx, int insn_bytes)
|
|||
int proc_hflags = ctx->hflags & MIPS_HFLAG_BMASK;
|
||||
/* Branches completion */
|
||||
clear_branch_hflags(ctx);
|
||||
ctx->bstate = BS_BRANCH;
|
||||
ctx->is_jmp = DISAS_NORETURN;
|
||||
/* FIXME: Need to clear can_do_io. */
|
||||
switch (proc_hflags & MIPS_HFLAG_BMASK_BASE) {
|
||||
case MIPS_HFLAG_FBNSLOT:
|
||||
|
@ -13574,7 +13570,7 @@ static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs)
|
|||
gen_helper_di(t0, cpu_env);
|
||||
gen_store_gpr(t0, rs);
|
||||
/* Stop translation as we may have switched the execution mode */
|
||||
ctx->bstate = BS_STOP;
|
||||
ctx->is_jmp = DISAS_STOP;
|
||||
tcg_temp_free(t0);
|
||||
}
|
||||
break;
|
||||
|
@ -13586,10 +13582,10 @@ static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs)
|
|||
save_cpu_state(ctx, 1);
|
||||
gen_helper_ei(t0, cpu_env);
|
||||
gen_store_gpr(t0, rs);
|
||||
/* BS_STOP isn't sufficient, we need to ensure we break out
|
||||
/* DISAS_STOP isn't sufficient, we need to ensure we break out
|
||||
of translated code to check for pending interrupts. */
|
||||
gen_save_pc(ctx->pc + 4);
|
||||
ctx->bstate = BS_EXCP;
|
||||
ctx->is_jmp = DISAS_EXIT;
|
||||
tcg_temp_free(t0);
|
||||
}
|
||||
break;
|
||||
|
@ -14745,7 +14741,7 @@ static void decode_micromips32_opc(CPUMIPSState *env, DisasContext *ctx)
|
|||
/* SYNCI */
|
||||
/* Break the TB to be able to sync copied instructions
|
||||
immediately */
|
||||
ctx->bstate = BS_STOP;
|
||||
ctx->is_jmp = DISAS_STOP;
|
||||
} else {
|
||||
/* TNEI */
|
||||
mips32_op = OPC_TNEI;
|
||||
|
@ -14776,7 +14772,7 @@ static void decode_micromips32_opc(CPUMIPSState *env, DisasContext *ctx)
|
|||
check_insn_opc_removed(ctx, ISA_MIPS32R6);
|
||||
/* Break the TB to be able to sync copied instructions
|
||||
immediately */
|
||||
ctx->bstate = BS_STOP;
|
||||
ctx->is_jmp = DISAS_STOP;
|
||||
break;
|
||||
case BC2F:
|
||||
case BC2T:
|
||||
|
@ -19601,7 +19597,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
|
|||
check_insn(ctx, ISA_MIPS32R2);
|
||||
/* Break the TB to be able to sync copied instructions
|
||||
immediately */
|
||||
ctx->bstate = BS_STOP;
|
||||
ctx->is_jmp = DISAS_STOP;
|
||||
break;
|
||||
case OPC_BPOSGE32: /* MIPS DSP branch */
|
||||
#if defined(TARGET_MIPS64)
|
||||
|
@ -19704,17 +19700,17 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
|
|||
gen_store_gpr(t0, rt);
|
||||
/* Stop translation as we may have switched
|
||||
the execution mode. */
|
||||
ctx->bstate = BS_STOP;
|
||||
ctx->is_jmp = DISAS_STOP;
|
||||
break;
|
||||
case OPC_EI:
|
||||
check_insn(ctx, ISA_MIPS32R2);
|
||||
save_cpu_state(ctx, 1);
|
||||
gen_helper_ei(t0, cpu_env);
|
||||
gen_store_gpr(t0, rt);
|
||||
/* BS_STOP isn't sufficient, we need to ensure we break out
|
||||
of translated code to check for pending interrupts. */
|
||||
/* DISAS_STOP isn't sufficient, we need to ensure we break
|
||||
out of translated code to check for pending interrupts */
|
||||
gen_save_pc(ctx->pc + 4);
|
||||
ctx->bstate = BS_EXCP;
|
||||
ctx->is_jmp = DISAS_EXIT;
|
||||
break;
|
||||
default: /* Invalid */
|
||||
MIPS_INVAL("mfmc0");
|
||||
|
@ -20216,7 +20212,7 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb)
|
|||
ctx.insn_flags = env->insn_flags;
|
||||
ctx.CP0_Config1 = env->CP0_Config1;
|
||||
ctx.tb = tb;
|
||||
ctx.bstate = BS_NONE;
|
||||
ctx.is_jmp = DISAS_NEXT;
|
||||
ctx.btarget = 0;
|
||||
ctx.kscrexist = (env->CP0_Config4 >> CP0C4_KScrExist) & 0xff;
|
||||
ctx.rxi = (env->CP0_Config3 >> CP0C3_RXI) & 1;
|
||||
|
@ -20257,13 +20253,13 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb)
|
|||
|
||||
LOG_DISAS("\ntb %p idx %d hflags %04x\n", tb, ctx.mem_idx, ctx.hflags);
|
||||
gen_tb_start(tb);
|
||||
while (ctx.bstate == BS_NONE) {
|
||||
while (ctx.is_jmp == DISAS_NEXT) {
|
||||
tcg_gen_insn_start(ctx.pc, ctx.hflags & MIPS_HFLAG_BMASK, ctx.btarget);
|
||||
num_insns++;
|
||||
|
||||
if (unlikely(cpu_breakpoint_test(cs, ctx.pc, BP_ANY))) {
|
||||
save_cpu_state(&ctx, 1);
|
||||
ctx.bstate = BS_BRANCH;
|
||||
ctx.is_jmp = DISAS_NORETURN;
|
||||
gen_helper_raise_exception_debug(cpu_env);
|
||||
/* The address covered by the breakpoint must be included in
|
||||
[tb->pc, tb->pc + tb->size) in order to for it to be
|
||||
|
@ -20337,23 +20333,23 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb)
|
|||
if (tb_cflags(tb) & CF_LAST_IO) {
|
||||
gen_io_end();
|
||||
}
|
||||
if (cs->singlestep_enabled && ctx.bstate != BS_BRANCH) {
|
||||
save_cpu_state(&ctx, ctx.bstate != BS_EXCP);
|
||||
if (cs->singlestep_enabled && ctx.is_jmp != DISAS_NORETURN) {
|
||||
save_cpu_state(&ctx, ctx.is_jmp != DISAS_EXIT);
|
||||
gen_helper_raise_exception_debug(cpu_env);
|
||||
} else {
|
||||
switch (ctx.bstate) {
|
||||
case BS_STOP:
|
||||
switch (ctx.is_jmp) {
|
||||
case DISAS_STOP:
|
||||
gen_save_pc(ctx.pc);
|
||||
tcg_gen_lookup_and_goto_ptr();
|
||||
break;
|
||||
case BS_NONE:
|
||||
case DISAS_NEXT:
|
||||
save_cpu_state(&ctx, 0);
|
||||
gen_goto_tb(&ctx, 0, ctx.pc);
|
||||
break;
|
||||
case BS_EXCP:
|
||||
case DISAS_EXIT:
|
||||
tcg_gen_exit_tb(0);
|
||||
break;
|
||||
case BS_BRANCH:
|
||||
case DISAS_NORETURN:
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
|
Loading…
Reference in a new issue