target/riscv: Raise the new execptions when 2nd stage translation fails
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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@ -587,16 +587,28 @@ static void raise_mmu_exception(CPURISCVState *env, target_ulong address,
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}
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switch (access_type) {
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case MMU_INST_FETCH:
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if (riscv_cpu_virt_enabled(env) && !first_stage) {
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cs->exception_index = RISCV_EXCP_INST_GUEST_PAGE_FAULT;
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} else {
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cs->exception_index = page_fault_exceptions ?
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RISCV_EXCP_INST_PAGE_FAULT : RISCV_EXCP_INST_ACCESS_FAULT;
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}
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break;
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case MMU_DATA_LOAD:
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if (riscv_cpu_virt_enabled(env) && !first_stage) {
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cs->exception_index = RISCV_EXCP_LOAD_GUEST_ACCESS_FAULT;
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} else {
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cs->exception_index = page_fault_exceptions ?
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RISCV_EXCP_LOAD_PAGE_FAULT : RISCV_EXCP_LOAD_ACCESS_FAULT;
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}
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break;
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case MMU_DATA_STORE:
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if (riscv_cpu_virt_enabled(env) && !first_stage) {
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cs->exception_index = RISCV_EXCP_STORE_GUEST_AMO_ACCESS_FAULT;
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} else {
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cs->exception_index = page_fault_exceptions ?
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RISCV_EXCP_STORE_PAGE_FAULT : RISCV_EXCP_STORE_AMO_ACCESS_FAULT;
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}
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break;
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default:
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g_assert_not_reached();
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