hw/arm_gic: Move NVIC specific reset to armv7m_nvic_reset
Move the NVIC specific bits of reset to the NVIC's own reset function, rather than using ifdefs in the common arm_gic reset. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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10
hw/arm_gic.c
10
hw/arm_gic.c
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@ -743,23 +743,13 @@ static void gic_reset(DeviceState *dev)
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s->current_pending[i] = 1023;
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s->running_irq[i] = 1023;
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s->running_priority[i] = 0x100;
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#ifdef NVIC
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/* The NVIC doesn't have per-cpu interfaces, so enable by default. */
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s->cpu_enabled[i] = 1;
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#else
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s->cpu_enabled[i] = 0;
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#endif
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}
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for (i = 0; i < 16; i++) {
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GIC_SET_ENABLED(i, ALL_CPU_MASK);
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GIC_SET_TRIGGER(i);
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}
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#ifdef NVIC
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/* The NVIC is always enabled. */
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s->enabled = 1;
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#else
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s->enabled = 0;
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#endif
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}
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static void gic_save(QEMUFile *f, void *opaque)
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@ -382,6 +382,13 @@ static void armv7m_nvic_reset(DeviceState *dev)
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{
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nvic_state *s = FROM_SYSBUSGIC(nvic_state, sysbus_from_qdev(dev));
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gic_reset(&s->gic.busdev.qdev);
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/* Common GIC reset resets to disabled; the NVIC doesn't have
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* per-CPU interfaces so mark our non-existent CPU interface
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* as enabled by default.
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*/
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s->gic.cpu_enabled[0] = 1;
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/* The NVIC as a whole is always enabled. */
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s->gic.enabled = 1;
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systick_reset(s);
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}
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