Rename variables and rearrange code to please gcc -Wshadow checks
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3023 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -354,7 +354,7 @@ static void slavio_serial_update_parameters(ChannelState *s)
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static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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{
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SerialState *ser = opaque;
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SerialState *serial = opaque;
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ChannelState *s;
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ChannelState *s;
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uint32_t saddr;
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uint32_t saddr;
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int newreg, channel;
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int newreg, channel;
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@ -362,7 +362,7 @@ static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint
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val &= 0xff;
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val &= 0xff;
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saddr = (addr & 3) >> 1;
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saddr = (addr & 3) >> 1;
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channel = (addr & SERIAL_MAXADDR) >> 2;
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channel = (addr & SERIAL_MAXADDR) >> 2;
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s = &ser->chn[channel];
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s = &serial->chn[channel];
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switch (saddr) {
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switch (saddr) {
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case 0:
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case 0:
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SER_DPRINTF("Write channel %c, reg[%d] = %2.2x\n", CHN_C(s), s->reg, val & 0xff);
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SER_DPRINTF("Write channel %c, reg[%d] = %2.2x\n", CHN_C(s), s->reg, val & 0xff);
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@ -407,13 +407,13 @@ static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint
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default:
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default:
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break;
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break;
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case 0x40:
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case 0x40:
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slavio_serial_reset_chn(&ser->chn[1]);
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slavio_serial_reset_chn(&serial->chn[1]);
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return;
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return;
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case 0x80:
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case 0x80:
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slavio_serial_reset_chn(&ser->chn[0]);
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slavio_serial_reset_chn(&serial->chn[0]);
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return;
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return;
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case 0xc0:
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case 0xc0:
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slavio_serial_reset(ser);
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slavio_serial_reset(serial);
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return;
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return;
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}
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}
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break;
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break;
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@ -446,7 +446,7 @@ static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint
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static uint32_t slavio_serial_mem_readb(void *opaque, target_phys_addr_t addr)
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static uint32_t slavio_serial_mem_readb(void *opaque, target_phys_addr_t addr)
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{
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{
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SerialState *ser = opaque;
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SerialState *serial = opaque;
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ChannelState *s;
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ChannelState *s;
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uint32_t saddr;
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uint32_t saddr;
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uint32_t ret;
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uint32_t ret;
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@ -454,7 +454,7 @@ static uint32_t slavio_serial_mem_readb(void *opaque, target_phys_addr_t addr)
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saddr = (addr & 3) >> 1;
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saddr = (addr & 3) >> 1;
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channel = (addr & SERIAL_MAXADDR) >> 2;
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channel = (addr & SERIAL_MAXADDR) >> 2;
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s = &ser->chn[channel];
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s = &serial->chn[channel];
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switch (saddr) {
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switch (saddr) {
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case 0:
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case 0:
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SER_DPRINTF("Read channel %c, reg[%d] = %2.2x\n", CHN_C(s), s->reg, s->rregs[s->reg]);
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SER_DPRINTF("Read channel %c, reg[%d] = %2.2x\n", CHN_C(s), s->reg, s->rregs[s->reg]);
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43
hw/sun4m.c
43
hw/sun4m.c
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@ -154,8 +154,6 @@ static void nvram_finish_partition (m48t59_t *nvram, uint32_t start,
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m48t59_write(nvram, start + 1, sum & 0xff);
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m48t59_write(nvram, start + 1, sum & 0xff);
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}
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}
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static m48t59_t *nvram;
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extern int nographic;
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extern int nographic;
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static void nvram_init(m48t59_t *nvram, uint8_t *macaddr, const char *cmdline,
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static void nvram_init(m48t59_t *nvram, uint8_t *macaddr, const char *cmdline,
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@ -292,13 +290,13 @@ static void secondary_cpu_reset(void *opaque)
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env->halted = 1;
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env->halted = 1;
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}
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}
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static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size,
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static void *sun4m_hw_init(const struct hwdef *hwdef, int RAM_size,
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DisplayState *ds, const char *cpu_model)
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DisplayState *ds, const char *cpu_model)
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{
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{
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CPUState *env, *envs[MAX_CPUS];
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CPUState *env, *envs[MAX_CPUS];
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unsigned int i;
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unsigned int i;
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void *iommu, *espdma, *ledma, *main_esp;
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void *iommu, *espdma, *ledma, *main_esp, *nvram;
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const sparc_def_t *def;
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const sparc_def_t *def;
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qemu_irq *cpu_irqs[MAX_CPUS], *slavio_irq, *slavio_cpu_irq,
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qemu_irq *cpu_irqs[MAX_CPUS], *slavio_irq, *slavio_cpu_irq,
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*espdma_irq, *ledma_irq;
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*espdma_irq, *ledma_irq;
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@ -328,7 +326,7 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size,
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cpu_irqs[i] = qemu_allocate_irqs(dummy_cpu_set_irq, NULL, MAX_PILS);
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cpu_irqs[i] = qemu_allocate_irqs(dummy_cpu_set_irq, NULL, MAX_PILS);
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/* allocate RAM */
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/* allocate RAM */
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cpu_register_physical_memory(0, ram_size, 0);
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cpu_register_physical_memory(0, RAM_size, 0);
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iommu = iommu_init(hwdef->iommu_base);
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iommu = iommu_init(hwdef->iommu_base);
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slavio_intctl = slavio_intctl_init(hwdef->intctl_base,
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slavio_intctl = slavio_intctl_init(hwdef->intctl_base,
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@ -347,7 +345,7 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size,
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fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
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fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
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exit (1);
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exit (1);
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}
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}
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tcx_init(ds, hwdef->tcx_base, phys_ram_base + ram_size, ram_size,
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tcx_init(ds, hwdef->tcx_base, phys_ram_base + RAM_size, RAM_size,
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hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
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hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
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if (nd_table[0].model == NULL
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if (nd_table[0].model == NULL
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@ -388,13 +386,16 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size,
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slavio_irq[hwdef->me_irq]);
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slavio_irq[hwdef->me_irq]);
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if (hwdef->cs_base != (target_phys_addr_t)-1)
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if (hwdef->cs_base != (target_phys_addr_t)-1)
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cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl);
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cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl);
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return nvram;
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}
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}
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static void sun4m_load_kernel(long vram_size, int ram_size, int boot_device,
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static void sun4m_load_kernel(long vram_size, int RAM_size, int boot_device,
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const char *kernel_filename,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *kernel_cmdline,
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const char *initrd_filename,
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const char *initrd_filename,
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int machine_id)
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int machine_id,
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void *nvram)
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{
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{
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int ret, linux_boot;
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int ret, linux_boot;
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char buf[1024];
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char buf[1024];
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@ -403,7 +404,7 @@ static void sun4m_load_kernel(long vram_size, int ram_size, int boot_device,
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linux_boot = (kernel_filename != NULL);
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linux_boot = (kernel_filename != NULL);
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prom_offset = ram_size + vram_size;
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prom_offset = RAM_size + vram_size;
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cpu_register_physical_memory(PROM_ADDR,
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cpu_register_physical_memory(PROM_ADDR,
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(PROM_SIZE_MAX + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK,
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(PROM_SIZE_MAX + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK,
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prom_offset | IO_MEM_ROM);
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prom_offset | IO_MEM_ROM);
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@ -451,7 +452,7 @@ static void sun4m_load_kernel(long vram_size, int ram_size, int boot_device,
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}
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}
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}
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}
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nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
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nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
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boot_device, ram_size, kernel_size, graphic_width,
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boot_device, RAM_size, kernel_size, graphic_width,
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graphic_height, graphic_depth, machine_id);
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graphic_height, graphic_depth, machine_id);
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}
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}
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@ -524,46 +525,48 @@ static const struct hwdef hwdefs[] = {
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},
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},
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};
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};
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static void sun4m_common_init(int ram_size, int boot_device, DisplayState *ds,
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static void sun4m_common_init(int RAM_size, int boot_device, DisplayState *ds,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model,
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const char *initrd_filename, const char *cpu_model,
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unsigned int machine, int max_ram)
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unsigned int machine, int max_ram)
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{
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{
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if ((unsigned int)ram_size > (unsigned int)max_ram) {
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void *nvram;
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if ((unsigned int)RAM_size > (unsigned int)max_ram) {
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fprintf(stderr, "qemu: Too much memory for this machine: %d, maximum %d\n",
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fprintf(stderr, "qemu: Too much memory for this machine: %d, maximum %d\n",
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(unsigned int)ram_size / (1024 * 1024),
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(unsigned int)RAM_size / (1024 * 1024),
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(unsigned int)max_ram / (1024 * 1024));
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(unsigned int)max_ram / (1024 * 1024));
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exit(1);
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exit(1);
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}
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}
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sun4m_hw_init(&hwdefs[machine], ram_size, ds, cpu_model);
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nvram = sun4m_hw_init(&hwdefs[machine], RAM_size, ds, cpu_model);
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sun4m_load_kernel(hwdefs[machine].vram_size, ram_size, boot_device,
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sun4m_load_kernel(hwdefs[machine].vram_size, RAM_size, boot_device,
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kernel_filename, kernel_cmdline, initrd_filename,
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kernel_filename, kernel_cmdline, initrd_filename,
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hwdefs[machine].machine_id);
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hwdefs[machine].machine_id, nvram);
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}
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}
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/* SPARCstation 5 hardware initialisation */
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/* SPARCstation 5 hardware initialisation */
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static void ss5_init(int ram_size, int vga_ram_size, int boot_device,
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static void ss5_init(int RAM_size, int vga_ram_size, int boot_device,
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DisplayState *ds, const char **fd_filename, int snapshot,
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DisplayState *ds, const char **fd_filename, int snapshot,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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{
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{
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if (cpu_model == NULL)
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if (cpu_model == NULL)
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cpu_model = "Fujitsu MB86904";
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cpu_model = "Fujitsu MB86904";
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sun4m_common_init(ram_size, boot_device, ds, kernel_filename,
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sun4m_common_init(RAM_size, boot_device, ds, kernel_filename,
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kernel_cmdline, initrd_filename, cpu_model,
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kernel_cmdline, initrd_filename, cpu_model,
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0, 0x10000000);
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0, 0x10000000);
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}
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}
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/* SPARCstation 10 hardware initialisation */
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/* SPARCstation 10 hardware initialisation */
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static void ss10_init(int ram_size, int vga_ram_size, int boot_device,
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static void ss10_init(int RAM_size, int vga_ram_size, int boot_device,
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DisplayState *ds, const char **fd_filename, int snapshot,
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DisplayState *ds, const char **fd_filename, int snapshot,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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{
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{
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if (cpu_model == NULL)
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if (cpu_model == NULL)
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cpu_model = "TI SuperSparc II";
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cpu_model = "TI SuperSparc II";
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sun4m_common_init(ram_size, boot_device, ds, kernel_filename,
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sun4m_common_init(RAM_size, boot_device, ds, kernel_filename,
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kernel_cmdline, initrd_filename, cpu_model,
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kernel_cmdline, initrd_filename, cpu_model,
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1, PROM_ADDR); // XXX prom overlap, actually first 4GB ok
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1, PROM_ADDR); // XXX prom overlap, actually first 4GB ok
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}
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}
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2
hw/tcx.c
2
hw/tcx.c
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@ -180,7 +180,7 @@ static void tcx_update_display(void *opaque)
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ram_addr_t page, page_min, page_max;
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ram_addr_t page, page_min, page_max;
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int y, y_start, dd, ds;
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int y, y_start, dd, ds;
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uint8_t *d, *s;
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uint8_t *d, *s;
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void (*f)(TCXState *s1, uint8_t *d, const uint8_t *s, int width);
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void (*f)(TCXState *s1, uint8_t *dst, const uint8_t *src, int width);
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if (ts->ds->depth == 0)
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if (ts->ds->depth == 0)
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return;
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return;
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