realview-pbx-a9: Set reset-cbar property for CPUs
If the CPU is a Cortex-A9 then we should set its reset-cbar property so that the guest can read the correct PERIPHBASE/CBAR register value; newer versions of the Linux kernel (as of commit bc41b8724 in 3.12) will otherwise assume the CPU is a buggy single core A9 SoC. The realview-pbx-a9 is the only one of the cluster of boards in realview.c which works with the Cortex-A9 (ie which gets an a9mpcore_priv device); make sure it also has reset-cbar set correctly. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1394462692-8871-3-git-send-email-peter.maydell@linaro.org
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@ -18,6 +18,7 @@
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#include "hw/i2c/i2c.h"
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#include "sysemu/blockdev.h"
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#include "exec/address-spaces.h"
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#include "qemu/error-report.h"
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#define SMP_BOOT_ADDR 0xe0000000
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#define SMP_BOOTREG_ADDR 0x10000030
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@ -49,6 +50,7 @@ static void realview_init(QEMUMachineInitArgs *args,
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{
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ARMCPU *cpu = NULL;
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CPUARMState *env;
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ObjectClass *cpu_oc;
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MemoryRegion *sysmem = get_system_memory();
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MemoryRegion *ram_lo = g_new(MemoryRegion, 1);
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MemoryRegion *ram_hi = g_new(MemoryRegion, 1);
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@ -70,12 +72,14 @@ static void realview_init(QEMUMachineInitArgs *args,
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uint32_t sys_id;
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ram_addr_t low_ram_size;
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ram_addr_t ram_size = args->ram_size;
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hwaddr periphbase = 0;
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switch (board_type) {
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case BOARD_EB:
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break;
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case BOARD_EB_MPCORE:
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is_mpcore = 1;
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periphbase = 0x10100000;
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break;
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case BOARD_PB_A8:
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is_pb = 1;
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@ -83,16 +87,37 @@ static void realview_init(QEMUMachineInitArgs *args,
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case BOARD_PBX_A9:
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is_mpcore = 1;
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is_pb = 1;
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periphbase = 0x1f000000;
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break;
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}
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for (n = 0; n < smp_cpus; n++) {
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cpu = cpu_arm_init(args->cpu_model);
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if (!cpu) {
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cpu_oc = cpu_class_by_name(TYPE_ARM_CPU, args->cpu_model);
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if (!cpu_oc) {
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fprintf(stderr, "Unable to find CPU definition\n");
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exit(1);
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}
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cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ);
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for (n = 0; n < smp_cpus; n++) {
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Object *cpuobj = object_new(object_class_get_name(cpu_oc));
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Error *err = NULL;
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if (is_pb && is_mpcore) {
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object_property_set_int(cpuobj, periphbase, "reset-cbar", &err);
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if (err) {
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error_report("%s", error_get_pretty(err));
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exit(1);
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}
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}
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object_property_set_bool(cpuobj, true, "realized", &err);
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if (err) {
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error_report("%s", error_get_pretty(err));
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exit(1);
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}
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cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpuobj), ARM_CPU_IRQ);
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}
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cpu = ARM_CPU(first_cpu);
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env = &cpu->env;
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if (arm_feature(env, ARM_FEATURE_V7)) {
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if (is_mpcore) {
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@ -141,16 +166,10 @@ static void realview_init(QEMUMachineInitArgs *args,
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sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000);
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if (is_mpcore) {
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hwaddr periphbase;
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dev = qdev_create(NULL, is_pb ? "a9mpcore_priv": "realview_mpcore");
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qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
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qdev_init_nofail(dev);
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busdev = SYS_BUS_DEVICE(dev);
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if (is_pb) {
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periphbase = 0x1f000000;
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} else {
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periphbase = 0x10100000;
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}
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sysbus_mmio_map(busdev, 0, periphbase);
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for (n = 0; n < smp_cpus; n++) {
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sysbus_connect_irq(busdev, n, cpu_irq[n]);
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