s390x: Rename and use constants for short PSW address and mask
Let's rename PSW_MASK_ESA_ADDR to PSW_MASK_SHORT_ADDR because we're not working with a ESA PSW which would not support the extended addressing bit. Also let's actually use it. Additionally we introduce PSW_MASK_SHORT_CTRL and use it throughout the codebase. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20200227092341.38558-1-frankja@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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@ -179,7 +179,7 @@ static void s390_ipl_realize(DeviceState *dev, Error **errp)
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/* if not Linux load the address of the (short) IPL PSW */
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/* if not Linux load the address of the (short) IPL PSW */
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ipl_psw = rom_ptr(4, 4);
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ipl_psw = rom_ptr(4, 4);
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if (ipl_psw) {
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if (ipl_psw) {
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pentry = be32_to_cpu(*ipl_psw) & 0x7fffffffUL;
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pentry = be32_to_cpu(*ipl_psw) & PSW_MASK_SHORT_ADDR;
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} else {
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} else {
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error_setg(&err, "Could not get IPL PSW");
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error_setg(&err, "Could not get IPL PSW");
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goto error;
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goto error;
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@ -78,13 +78,13 @@ static void s390_cpu_load_normal(CPUState *s)
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S390CPU *cpu = S390_CPU(s);
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S390CPU *cpu = S390_CPU(s);
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uint64_t spsw = ldq_phys(s->as, 0);
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uint64_t spsw = ldq_phys(s->as, 0);
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cpu->env.psw.mask = spsw & 0xffffffff80000000ULL;
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cpu->env.psw.mask = spsw & PSW_MASK_SHORT_CTRL;
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/*
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/*
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* Invert short psw indication, so SIE will report a specification
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* Invert short psw indication, so SIE will report a specification
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* exception if it was not set.
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* exception if it was not set.
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*/
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*/
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cpu->env.psw.mask ^= PSW_MASK_SHORTPSW;
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cpu->env.psw.mask ^= PSW_MASK_SHORTPSW;
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cpu->env.psw.addr = spsw & 0x7fffffffULL;
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cpu->env.psw.addr = spsw & PSW_MASK_SHORT_ADDR;
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s390_cpu_set_state(S390_CPU_STATE_OPERATING, cpu);
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s390_cpu_set_state(S390_CPU_STATE_OPERATING, cpu);
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}
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}
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@ -276,7 +276,8 @@ extern const VMStateDescription vmstate_s390_cpu;
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#define PSW_MASK_RI 0x0000008000000000ULL
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#define PSW_MASK_RI 0x0000008000000000ULL
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#define PSW_MASK_64 0x0000000100000000ULL
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#define PSW_MASK_64 0x0000000100000000ULL
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#define PSW_MASK_32 0x0000000080000000ULL
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#define PSW_MASK_32 0x0000000080000000ULL
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#define PSW_MASK_ESA_ADDR 0x000000007fffffffULL
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#define PSW_MASK_SHORT_ADDR 0x000000007fffffffULL
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#define PSW_MASK_SHORT_CTRL 0xffffffff80000000ULL
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#undef PSW_ASC_PRIMARY
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#undef PSW_ASC_PRIMARY
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#undef PSW_ASC_ACCREG
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#undef PSW_ASC_ACCREG
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