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intel-iommu: Accept 64-bit writes to FEADDR

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Xen is doing this [1] and currently triggers an abort.

[1] http://xenbits.xenproject.org/gitweb/?p=xen.git;a=blob;f=xen/drivers/passthrough/vtd/iommu.c;h=daaed0abbdd06b6ba3d948ea103aadf02651e83c;hb=refs/heads/master#l1108

Reported-by: Luis Lloret <luis_lloret@mentor.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Jan Kiszka 2018-02-24 09:30:12 +01:00 committed by Michael S. Tsirkin
parent 2080a29f0e
commit b7a7bb358f
1 changed files with 9 additions and 2 deletions
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11
hw/i386/intel_iommu.c
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@ -2129,8 +2129,15 @@ static void vtd_mem_write(void *opaque, hwaddr addr,
/* Fault Event Address Register, 32-bit */
case DMAR_FEADDR_REG:
assert(size == 4);
vtd_set_long(s, addr, val);
if (size == 4) {
vtd_set_long(s, addr, val);
} else {
/*
* While the register is 32-bit only, some guests (Xen...) write to
* it with 64-bit.
*/
vtd_set_quad(s, addr, val);
}
break;
/* Fault Event Upper Address Register, 32-bit */