fixed VIA irq register access
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1513 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -298,9 +298,11 @@ static uint32_t cuda_readb(void *opaque, target_phys_addr_t addr)
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break;
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case 13:
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val = s->ifr;
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if (s->ifr & s->ier)
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val |= 0x80;
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break;
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case 14:
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val = s->ier;
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val = s->ier | 0x80;
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break;
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default:
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case 15:
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@ -379,7 +381,6 @@ static void cuda_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
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cuda_update_irq(s);
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break;
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case 14:
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#if 0
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if (val & IER_SET) {
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/* set bits */
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s->ier |= val & 0x7f;
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@ -387,10 +388,6 @@ static void cuda_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
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/* reset bits */
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s->ier &= ~val;
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}
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#else
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/* XXX: please explain me why the SPEC is not correct ! */
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s->ier = val;
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#endif
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cuda_update_irq(s);
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break;
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default:
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