target/arm: Fix aa64 FCADD and FCMLA decode
These insns require u=1; failed to include that in the switch
cases. This probably happened during one of the rebases just
before final commit.
Fixes: d17b7cdcf4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Message-id: 20180810193129.1556-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -11423,12 +11423,12 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
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}
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feature = ARM_FEATURE_V8_DOTPROD;
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break;
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case 0x8: /* FCMLA, #0 */
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case 0x9: /* FCMLA, #90 */
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case 0xa: /* FCMLA, #180 */
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case 0xb: /* FCMLA, #270 */
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case 0xc: /* FCADD, #90 */
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case 0xe: /* FCADD, #270 */
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case 0x18: /* FCMLA, #0 */
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case 0x19: /* FCMLA, #90 */
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case 0x1a: /* FCMLA, #180 */
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case 0x1b: /* FCMLA, #270 */
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case 0x1c: /* FCADD, #90 */
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case 0x1e: /* FCADD, #270 */
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if (size == 0
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|| (size == 1 && !arm_dc_feature(s, ARM_FEATURE_V8_FP16))
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|| (size == 3 && !is_q)) {
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