target/arm: Use the int-to-float-scale softfloat routines
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180814002653.12828-4-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -11564,12 +11564,7 @@ float32 VFP_HELPER(fcvts, d)(float64 x, CPUARMState *env)
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#define VFP_CONV_FIX_FLOAT(name, p, fsz, isz, itype) \
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#define VFP_CONV_FIX_FLOAT(name, p, fsz, isz, itype) \
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float##fsz HELPER(vfp_##name##to##p)(uint##isz##_t x, uint32_t shift, \
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float##fsz HELPER(vfp_##name##to##p)(uint##isz##_t x, uint32_t shift, \
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void *fpstp) \
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void *fpstp) \
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{ \
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{ return itype##_to_##float##fsz##_scalbn(x, -shift, fpstp); }
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float_status *fpst = fpstp; \
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float##fsz tmp; \
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tmp = itype##_to_##float##fsz(x, fpst); \
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return float##fsz##_scalbn(tmp, -(int)shift, fpst); \
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}
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/* Notice that we want only input-denormal exception flags from the
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/* Notice that we want only input-denormal exception flags from the
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* scalbn operation: the other possible flags (overflow+inexact if
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* scalbn operation: the other possible flags (overflow+inexact if
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@ -11622,38 +11617,24 @@ VFP_CONV_FIX_A64(uq, s, 32, 64, uint64)
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#undef VFP_CONV_FLOAT_FIX_ROUND
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#undef VFP_CONV_FLOAT_FIX_ROUND
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#undef VFP_CONV_FIX_A64
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#undef VFP_CONV_FIX_A64
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/* Conversion to/from f16 can overflow to infinity before/after scaling.
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* Therefore we convert to f64, scale, and then convert f64 to f16; or
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* vice versa for conversion to integer.
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*
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* For 16- and 32-bit integers, the conversion to f64 never rounds.
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* For 64-bit integers, any integer that would cause rounding will also
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* overflow to f16 infinity, so there is no double rounding problem.
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*/
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static float16 do_postscale_fp16(float64 f, int shift, float_status *fpst)
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{
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return float64_to_float16(float64_scalbn(f, -shift, fpst), true, fpst);
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}
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uint32_t HELPER(vfp_sltoh)(uint32_t x, uint32_t shift, void *fpst)
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uint32_t HELPER(vfp_sltoh)(uint32_t x, uint32_t shift, void *fpst)
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{
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{
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return do_postscale_fp16(int32_to_float64(x, fpst), shift, fpst);
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return int32_to_float16_scalbn(x, -shift, fpst);
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}
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}
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uint32_t HELPER(vfp_ultoh)(uint32_t x, uint32_t shift, void *fpst)
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uint32_t HELPER(vfp_ultoh)(uint32_t x, uint32_t shift, void *fpst)
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{
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{
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return do_postscale_fp16(uint32_to_float64(x, fpst), shift, fpst);
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return uint32_to_float16_scalbn(x, -shift, fpst);
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}
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}
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uint32_t HELPER(vfp_sqtoh)(uint64_t x, uint32_t shift, void *fpst)
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uint32_t HELPER(vfp_sqtoh)(uint64_t x, uint32_t shift, void *fpst)
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{
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{
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return do_postscale_fp16(int64_to_float64(x, fpst), shift, fpst);
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return int64_to_float16_scalbn(x, -shift, fpst);
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}
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}
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uint32_t HELPER(vfp_uqtoh)(uint64_t x, uint32_t shift, void *fpst)
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uint32_t HELPER(vfp_uqtoh)(uint64_t x, uint32_t shift, void *fpst)
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{
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{
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return do_postscale_fp16(uint64_to_float64(x, fpst), shift, fpst);
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return uint64_to_float16_scalbn(x, -shift, fpst);
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}
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}
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static float64 do_prescale_fp16(float16 f, int shift, float_status *fpst)
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static float64 do_prescale_fp16(float16 f, int shift, float_status *fpst)
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