fix wrong bitmasks for CP0_Context and CP0_EntryHi (Thiemo Seufer)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1937 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard 2006-05-22 22:14:43 +00:00
parent 3d9fb9fefe
commit ba9a74dae0
2 changed files with 3 additions and 3 deletions

View file

@ -231,7 +231,7 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
env->CP0_Context = (env->CP0_Context & 0xff800000) |
((address >> 9) & 0x007ffff0);
env->CP0_EntryHi =
(env->CP0_EntryHi & 0xFF) | (address & 0xFFFFF000);
(env->CP0_EntryHi & 0xFF) | (address & 0xFFFFE000);
env->exception_index = exception;
env->error_code = error_code;
ret = 1;

View file

@ -342,7 +342,7 @@ void do_mtc0 (int reg, int sel)
rn = "EntryLo1";
break;
case 4:
val = (env->CP0_Context & 0xFF000000) | (T0 & 0x00FFFFF0);
val = (env->CP0_Context & 0xFF800000) | (T0 & 0x007FFFF0);
old = env->CP0_Context;
env->CP0_Context = val;
rn = "Context";
@ -366,7 +366,7 @@ void do_mtc0 (int reg, int sel)
rn = "Count";
break;
case 10:
val = T0 & 0xFFFFF0FF;
val = T0 & 0xFFFFE0FF;
old = env->CP0_EntryHi;
env->CP0_EntryHi = val;
/* If the ASID changes, flush qemu's TLB. */