diff --git a/hw/mainstone.c b/hw/mainstone.c
index 58e3f8670d..18d1415e4d 100644
--- a/hw/mainstone.c
+++ b/hw/mainstone.c
@@ -117,7 +117,7 @@ static void mainstone_common_init(ram_addr_t ram_size,
         }
     }
 
-    mst_irq = mst_irq_init(cpu, MST_FPGA_PHYS, PXA2XX_PIC_GPIO_0);
+    mst_irq = mst_irq_init(MST_FPGA_PHYS, cpu->pic[PXA2XX_PIC_GPIO_0]);
 
     /* setup keypad */
     printf("map addr %p\n", &map);
diff --git a/hw/mainstone.h b/hw/mainstone.h
index 9618c0632a..35329f1950 100644
--- a/hw/mainstone.h
+++ b/hw/mainstone.h
@@ -33,6 +33,6 @@
 #define S1_IRQ        15
 
 extern qemu_irq
-*mst_irq_init(PXA2xxState *cpu, uint32_t base, int irq);
+*mst_irq_init(uint32_t base, qemu_irq irq);
 
 #endif /* __MAINSTONE_H__ */
diff --git a/hw/mst_fpga.c b/hw/mst_fpga.c
index 5252fc5e1c..b59352b4c8 100644
--- a/hw/mst_fpga.c
+++ b/hw/mst_fpga.c
@@ -28,7 +28,7 @@
 #define MST_PCMCIA1		0xe4
 
 typedef struct mst_irq_state{
-	qemu_irq *parent;
+	qemu_irq parent;
 	qemu_irq *pins;
 
 	uint32_t prev_level;
@@ -72,7 +72,7 @@ mst_fpga_set_irq(void *opaque, int irq, int level)
 
 	if(s->intmskena & (1u << irq)) {
 		s->intsetclr = 1u << irq;
-		qemu_set_irq(s->parent[0], level);
+		qemu_set_irq(s->parent, level);
 	}
 }
 
@@ -109,7 +109,7 @@ mst_fpga_readb(void *opaque, target_phys_addr_t addr)
 		return s->pcmcia1;
 	default:
 		printf("Mainstone - mst_fpga_readb: Bad register offset "
-			REG_FMT " \n", addr);
+			"0x" TARGET_FMT_plx " \n", addr);
 	}
 	return 0;
 }
@@ -160,7 +160,7 @@ mst_fpga_writeb(void *opaque, target_phys_addr_t addr, uint32_t value)
 		break;
 	default:
 		printf("Mainstone - mst_fpga_writeb: Bad register offset "
-			REG_FMT " \n", addr);
+			"0x" TARGET_FMT_plx " \n", addr);
 	}
 }
 
@@ -216,7 +216,7 @@ mst_fpga_load(QEMUFile *f, void *opaque, int version_id)
 	return 0;
 }
 
-qemu_irq *mst_irq_init(PXA2xxState *cpu, uint32_t base, int irq)
+qemu_irq *mst_irq_init(uint32_t base, qemu_irq irq)
 {
 	mst_irq_state *s;
 	int iomemtype;
@@ -225,7 +225,7 @@ qemu_irq *mst_irq_init(PXA2xxState *cpu, uint32_t base, int irq)
 	s = (mst_irq_state  *)
 		qemu_mallocz(sizeof(mst_irq_state));
 
-	s->parent = &cpu->pic[irq];
+	s->parent = irq;
 
 	/* alloc the external 16 irqs */
 	qi  = qemu_allocate_irqs(mst_fpga_set_irq, s, MST_NUM_IRQS);