From 9099a36b4bb81f84004b77f08e58ac2c67eed0e7 Mon Sep 17 00:00:00 2001 From: Heiher Date: Fri, 14 Oct 2016 10:46:04 +0800 Subject: [PATCH 1/4] target-mips: Fix Loongson pandn instruction. pandn FD, FS, FT Operation: FD = ((NOT FS) AND FT) Signed-off-by: Heiher Signed-off-by: Fuxin Zhang Reviewed-by: Yongbok Kim Signed-off-by: Yongbok Kim --- target-mips/translate.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index d8dde7a2f5..5ad97c7a4e 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -3945,9 +3945,12 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt) LMI_DIRECT(XOR_CP2, xor, xor); LMI_DIRECT(NOR_CP2, nor, nor); LMI_DIRECT(AND_CP2, and, and); - LMI_DIRECT(PANDN, pandn, andc); LMI_DIRECT(OR, or, or); + case OPC_PANDN: + tcg_gen_andc_i64(t0, t1, t0); + break; + case OPC_PINSRH_0: tcg_gen_deposit_i64(t0, t0, t1, 0, 16); break; From bb7cab5f3466540f5603b209c0df2e27a02fbb95 Mon Sep 17 00:00:00 2001 From: Heiher Date: Thu, 13 Oct 2016 15:09:39 +0800 Subject: [PATCH 2/4] target-mips: Fix Loongson multimedia 'or' instruction. Signed-off-by: Heiher Signed-off-by: Fuxin Zhang Reviewed-by: Yongbok Kim Signed-off-by: Yongbok Kim --- target-mips/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index 5ad97c7a4e..e26f74274b 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -3945,7 +3945,7 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt) LMI_DIRECT(XOR_CP2, xor, xor); LMI_DIRECT(NOR_CP2, nor, nor); LMI_DIRECT(AND_CP2, and, and); - LMI_DIRECT(OR, or, or); + LMI_DIRECT(OR_CP2, or, or); case OPC_PANDN: tcg_gen_andc_i64(t0, t1, t0); From b5a587b613f6151c2ce164552579ae64f2ddfd1c Mon Sep 17 00:00:00 2001 From: Heiher Date: Thu, 13 Oct 2016 15:10:32 +0800 Subject: [PATCH 3/4] target-mips: Fix Loongson multimedia instructions. Needed to emit FPU exception on Loongson multimedia instructions executing if Status:CU1 is clear. or FPR changes may be missed on Linux. Signed-off-by: Heiher Signed-off-by: Fuxin Zhang Reviewed-by: Yongbok Kim Signed-off-by: Yongbok Kim --- target-mips/translate.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target-mips/translate.c b/target-mips/translate.c index e26f74274b..57b824ff2d 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -3871,6 +3871,7 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt) break; } + check_cp1_enabled(ctx); gen_load_fpr64(ctx, t0, rs); gen_load_fpr64(ctx, t1, rt); From e6e2784cacd4cfec149a7690976b9ff15e541c4d Mon Sep 17 00:00:00 2001 From: Yongbok Kim Date: Wed, 30 Nov 2016 15:25:04 +0000 Subject: [PATCH 4/4] target-mips: fix bad shifts in {dextp|dextpdp} Fixed issues in the MIPSDSP64 instructions dextp and dextpdp. Shifting can go out of 32 bit range. https://bugs.launchpad.net/qemu/+bug/1631625 Reported-by: Thomas Huth Reported-by: Jia Liu Signed-off-by: Yongbok Kim Reviewed-by: Thomas Huth --- target-mips/dsp_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c index df7d2204b0..dc707934ea 100644 --- a/target-mips/dsp_helper.c +++ b/target-mips/dsp_helper.c @@ -3477,7 +3477,7 @@ target_ulong helper_dextp(target_ulong ac, target_ulong size, CPUMIPSState *env) if (sub >= -1) { temp = (tempB << (64 - len)) | (tempA >> len); - temp = temp & ((0x01 << (size + 1)) - 1); + temp = temp & ((1ULL << (size + 1)) - 1); set_DSPControl_efi(0, env); } else { set_DSPControl_efi(1, env); @@ -3506,7 +3506,7 @@ target_ulong helper_dextpdp(target_ulong ac, target_ulong size, if (sub >= -1) { temp = (tempB << (64 - len)) | (tempA >> len); - temp = temp & ((0x01 << (size + 1)) - 1); + temp = temp & ((1ULL << (size + 1)) - 1); set_DSPControl_pos(sub, env); set_DSPControl_efi(0, env); } else {