From bc814401c2061f0d362f0fb709397a890df47e7c Mon Sep 17 00:00:00 2001 From: ths Date: Sun, 21 Jan 2007 03:12:25 +0000 Subject: [PATCH] Bring TLB / PageSize handling in line with real hardware behaviour. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2341 c046a42c-6fe2-441c-8c8c-71466251a162 --- target-mips/helper.c | 22 +++++----------------- target-mips/op_helper.c | 8 -------- 2 files changed, 5 insertions(+), 25 deletions(-) diff --git a/target-mips/helper.c b/target-mips/helper.c index 43038c2d7e..091dbffb7f 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -50,7 +50,7 @@ static int map_address (CPUState *env, target_ulong *physical, int *prot, tlb = &env->tlb[i]; /* Check ASID, virtual page number & size */ if ((tlb->G == 1 || tlb->ASID == ASID) && - tlb->VPN == tag && address < tlb->end2) { + tlb->VPN == tag) { /* TLB match */ n = (address >> TARGET_PAGE_BITS) & 1; /* Check access rights */ @@ -420,7 +420,6 @@ void do_interrupt (CPUState *env) void invalidate_tlb (CPUState *env, int idx, int use_extra) { tlb_t *tlb; - target_ulong addr; uint8_t ASID; ASID = env->CP0_EntryHi & 0xFF; @@ -441,19 +440,8 @@ void invalidate_tlb (CPUState *env, int idx, int use_extra) return; } - if (tlb->V0) { - addr = tlb->VPN; - while (addr < tlb->end) { - tlb_flush_page (env, addr); - addr += TARGET_PAGE_SIZE; - } - } - if (tlb->V1) { - addr = tlb->end; - while (addr < tlb->end2) { - tlb_flush_page (env, addr); - addr += TARGET_PAGE_SIZE; - } - } + if (tlb->V0) + tlb_flush_page (env, tlb->VPN); + if (tlb->V1) + tlb_flush_page (env, tlb->VPN + TARGET_PAGE_SIZE); } - diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index f4eb6e6a03..849482478d 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -387,16 +387,11 @@ static void mips_tlb_flush_extra (CPUState *env, int first) static void fill_tlb (int idx) { tlb_t *tlb; - int size; /* XXX: detect conflicting TLBs and raise a MCHECK exception when needed */ tlb = &env->tlb[idx]; tlb->VPN = env->CP0_EntryHi & (int32_t)0xFFFFE000; tlb->ASID = env->CP0_EntryHi & 0xFF; - size = env->CP0_PageMask >> 13; - size = 4 * (size + 1); - tlb->end = tlb->VPN + (1 << (8 + size)); - tlb->end2 = tlb->end + (1 << (8 + size)); tlb->G = env->CP0_EntryLo0 & env->CP0_EntryLo1 & 1; tlb->V0 = (env->CP0_EntryLo0 & 2) != 0; tlb->D0 = (env->CP0_EntryLo0 & 4) != 0; @@ -467,7 +462,6 @@ void do_tlbr (void) { tlb_t *tlb; uint8_t ASID; - int size; ASID = env->CP0_EntryHi & 0xFF; tlb = &env->tlb[env->CP0_index & (MIPS_TLB_NB - 1)]; @@ -479,8 +473,6 @@ void do_tlbr (void) mips_tlb_flush_extra(env, MIPS_TLB_NB); env->CP0_EntryHi = tlb->VPN | tlb->ASID; - size = (tlb->end - tlb->VPN) >> 12; - env->CP0_PageMask = (size - 1) << 13; env->CP0_EntryLo0 = tlb->G | (tlb->V0 << 1) | (tlb->D0 << 2) | (tlb->C0 << 3) | (tlb->PFN[0] >> 6); env->CP0_EntryLo1 = tlb->G | (tlb->V1 << 1) | (tlb->D1 << 2) |