target/arm: Convert PLI, PLD, PLDW
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190904193059.26202-39-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -54,3 +54,13 @@ SB 1111 0101 0111 1111 1111 0000 0111 0000
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# Set Endianness
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SETEND 1111 0001 0000 0001 0000 00 E:1 0 0000 0000 &setend
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# Preload instructions
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PLD 1111 0101 -101 ---- 1111 ---- ---- ---- # (imm, lit) 5te
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PLDW 1111 0101 -001 ---- 1111 ---- ---- ---- # (imm, lit) 7mp
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PLI 1111 0100 -101 ---- 1111 ---- ---- ---- # (imm, lit) 7
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PLD 1111 0111 -101 ---- 1111 ----- -- 0 ---- # (register) 5te
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PLDW 1111 0111 -001 ---- 1111 ----- -- 0 ---- # (register) 7mp
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PLI 1111 0110 -101 ---- 1111 ----- -- 0 ---- # (register) 7
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@ -10252,6 +10252,26 @@ static bool trans_SETEND(DisasContext *s, arg_SETEND *a)
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return true;
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}
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/*
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* Preload instructions
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* All are nops, contingent on the appropriate arch level.
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*/
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static bool trans_PLD(DisasContext *s, arg_PLD *a)
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{
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return ENABLE_ARCH_5TE;
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}
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static bool trans_PLDW(DisasContext *s, arg_PLD *a)
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{
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return arm_dc_feature(s, ARM_FEATURE_V7MP);
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}
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static bool trans_PLI(DisasContext *s, arg_PLD *a)
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{
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return ENABLE_ARCH_7;
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}
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/*
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* Legacy decoder.
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*/
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@ -10312,23 +10332,6 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
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}
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return;
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}
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if (((insn & 0x0f30f000) == 0x0510f000) ||
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((insn & 0x0f30f010) == 0x0710f000)) {
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if ((insn & (1 << 22)) == 0) {
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/* PLDW; v7MP */
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if (!arm_dc_feature(s, ARM_FEATURE_V7MP)) {
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goto illegal_op;
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}
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}
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/* Otherwise PLD; v5TE+ */
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ARCH(5TE);
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return;
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}
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if (((insn & 0x0f70f000) == 0x0450f000) ||
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((insn & 0x0f70f010) == 0x0650f000)) {
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ARCH(7);
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return; /* PLI; V7 */
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}
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if (((insn & 0x0f700000) == 0x04100000) ||
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((insn & 0x0f700010) == 0x06100000)) {
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if (!arm_dc_feature(s, ARM_FEATURE_V7MP)) {
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