target/alpha: Implement WTINT inline
Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -1157,6 +1157,7 @@ static ExitStatus gen_call_pal(DisasContext *ctx, int palcode)
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#ifndef CONFIG_USER_ONLY
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/* Privileged PAL code */
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if (palcode < 0x40 && (ctx->tb->flags & TB_FLAGS_USER_MODE) == 0) {
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TCGv tmp;
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switch (palcode) {
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case 0x01:
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/* CFLUSH */
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@ -1182,10 +1183,8 @@ static ExitStatus gen_call_pal(DisasContext *ctx, int palcode)
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offsetof(CPUAlphaState, sysval));
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break;
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case 0x35: {
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case 0x35:
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/* SWPIPL */
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TCGv tmp;
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/* Note that we already know we're in kernel mode, so we know
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that PS only contains the 3 IPL bits. */
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tcg_gen_ld8u_i64(ctx->ir[IR_V0], cpu_env,
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@ -1197,7 +1196,6 @@ static ExitStatus gen_call_pal(DisasContext *ctx, int palcode)
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tcg_gen_st8_i64(tmp, cpu_env, offsetof(CPUAlphaState, ps));
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tcg_temp_free(tmp);
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break;
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}
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case 0x36:
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/* RDPS */
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@ -1220,6 +1218,14 @@ static ExitStatus gen_call_pal(DisasContext *ctx, int palcode)
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-offsetof(AlphaCPU, env) + offsetof(CPUState, cpu_index));
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break;
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case 0x3E:
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/* WTINT */
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tmp = tcg_const_i64(1);
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tcg_gen_st32_i64(tmp, cpu_env, -offsetof(AlphaCPU, env) +
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offsetof(CPUState, halted));
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tcg_gen_movi_i64(ctx->ir[IR_V0], 0);
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return gen_excp(ctx, EXCP_HALTED, 0);
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default:
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palcode &= 0x3f;
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goto do_call_pal;
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@ -1369,7 +1375,7 @@ static ExitStatus gen_mtpr(DisasContext *ctx, TCGv vb, int regno)
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tmp = tcg_const_i64(1);
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tcg_gen_st32_i64(tmp, cpu_env, -offsetof(AlphaCPU, env) +
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offsetof(CPUState, halted));
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return gen_excp(ctx, EXCP_HLT, 0);
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return gen_excp(ctx, EXCP_HALTED, 0);
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case 252:
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/* HALT */
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