target/i386: set rip_offset for further SSE instructions
It turns out that my recent fix to set rip_offset when emulating some SSE4.1 instructions needs generalizing to cover a wider class of instructions. Specifically, every instruction in the sse_op_table7 table, coming from various instruction set extensions, has an 8-bit immediate operand that comes after any memory operand, and so needs rip_offset set for correctness if there is a memory operand that is rip-relative, and my patch only set it for a subset of those instructions. This patch moves the rip_offset setting to cover the wider class of instructions, so fixing 9 further gcc testsuite failures in my GCC 6-based testing. (I do not know whether there might be still further classes of instructions missing this setting.) Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.20.1708082350340.23380@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -4076,10 +4076,11 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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if (!(s->cpuid_ext_features & sse_op_table7[b].ext_mask))
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goto illegal_op;
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s->rip_offset = 1;
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if (sse_fn_eppi == SSE_SPECIAL) {
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ot = mo_64_32(s->dflag);
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rm = (modrm & 7) | REX_B(s);
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s->rip_offset = 1;
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if (mod != 3)
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gen_lea_modrm(env, s, modrm);
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reg = ((modrm >> 3) & 7) | rex_r;
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