tcg/mips: Make direct jump patching thread-safe
Ensure direct jump patching in MIPS is atomic by using atomic_read()/atomic_set() for code patching. Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> Signed-off-by: Sergey Fedorov <sergey.fedorov@linaro.org> Message-Id: <1461341333-19646-11-git-send-email-sergey.fedorov@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> [rth: Merged the deposit32 followup.] [rth: Merged the following followup.] Message-Id: <1462210518-26522-1-git-send-email-sergey.fedorov@linaro.org>
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@ -1885,7 +1885,6 @@ static void tcg_target_init(TCGContext *s)
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void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
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void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
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{
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{
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uint32_t *ptr = (uint32_t *)jmp_addr;
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atomic_set((uint32_t *)jmp_addr, deposit32(OPC_J, 0, 26, addr >> 2));
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*ptr = deposit32(*ptr, 0, 26, addr >> 2);
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flush_icache_range(jmp_addr, jmp_addr + 4);
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flush_icache_range(jmp_addr, jmp_addr + 4);
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}
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}
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