target/arm: fix crash on pmu register access
Fix a QEMU NULL derefence that occurs when the guest attempts to
enable PMU counters with a non-v8 cpu model or a v8 cpu model
which has not configured a PMU.
Fixes: 4e7beb0cc0
("target/arm: Add a timer to predict PMU counter overflow")
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190322162333.17159-2-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1259,6 +1259,10 @@ static bool pmu_counter_enabled(CPUARMState *env, uint8_t counter)
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int el = arm_current_el(env);
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uint8_t hpmn = env->cp15.mdcr_el2 & MDCR_HPMN;
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if (!arm_feature(env, ARM_FEATURE_PMU)) {
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return false;
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}
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if (!arm_feature(env, ARM_FEATURE_EL2) ||
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(counter < hpmn || counter == 31)) {
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e = env->cp15.c9_pmcr & PMCRE;
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