intc/openpic: Convert to QOM realize
Split qdev initfn into instance_init and realize functions. Change one occurrence of "klass" while at it. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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cbe72019b1
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@ -1527,8 +1527,16 @@ static void map_list(OpenPICState *opp, const MemReg *list, int *count)
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}
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}
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}
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}
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static int openpic_init(SysBusDevice *dev)
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static void openpic_init(Object *obj)
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{
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{
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OpenPICState *opp = OPENPIC(obj);
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memory_region_init(&opp->mem, "openpic", 0x40000);
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}
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static void openpic_realize(DeviceState *dev, Error **errp)
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{
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SysBusDevice *d = SYS_BUS_DEVICE(dev);
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OpenPICState *opp = OPENPIC(dev);
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OpenPICState *opp = OPENPIC(dev);
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int i, j;
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int i, j;
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int list_count = 0;
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int list_count = 0;
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@ -1562,8 +1570,6 @@ static int openpic_init(SysBusDevice *dev)
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{NULL}
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{NULL}
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};
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};
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memory_region_init(&opp->mem, "openpic", 0x40000);
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switch (opp->model) {
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switch (opp->model) {
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case OPENPIC_MODEL_FSL_MPIC_20:
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case OPENPIC_MODEL_FSL_MPIC_20:
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default:
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default:
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@ -1606,9 +1612,9 @@ static int openpic_init(SysBusDevice *dev)
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opp->brr1 = -1;
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opp->brr1 = -1;
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opp->mpic_mode_mask = GCR_MODE_MIXED;
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opp->mpic_mode_mask = GCR_MODE_MIXED;
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/* Only UP supported today */
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if (opp->nb_cpus != 1) {
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if (opp->nb_cpus != 1) {
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return -EINVAL;
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error_setg(errp, "Only UP supported today");
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return;
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}
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}
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map_list(opp, list_le, &list_count);
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map_list(opp, list_le, &list_count);
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@ -1618,17 +1624,15 @@ static int openpic_init(SysBusDevice *dev)
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for (i = 0; i < opp->nb_cpus; i++) {
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for (i = 0; i < opp->nb_cpus; i++) {
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opp->dst[i].irqs = g_new(qemu_irq, OPENPIC_OUTPUT_NB);
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opp->dst[i].irqs = g_new(qemu_irq, OPENPIC_OUTPUT_NB);
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for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
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for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
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sysbus_init_irq(dev, &opp->dst[i].irqs[j]);
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sysbus_init_irq(d, &opp->dst[i].irqs[j]);
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}
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}
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}
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}
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register_savevm(DEVICE(opp), "openpic", 0, 2,
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register_savevm(dev, "openpic", 0, 2,
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openpic_save, openpic_load, opp);
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openpic_save, openpic_load, opp);
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sysbus_init_mmio(dev, &opp->mem);
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sysbus_init_mmio(d, &opp->mem);
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qdev_init_gpio_in(&dev->qdev, openpic_set_irq, opp->max_irq);
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qdev_init_gpio_in(dev, openpic_set_irq, opp->max_irq);
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return 0;
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}
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}
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static Property openpic_properties[] = {
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static Property openpic_properties[] = {
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@ -1637,12 +1641,11 @@ static Property openpic_properties[] = {
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DEFINE_PROP_END_OF_LIST(),
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DEFINE_PROP_END_OF_LIST(),
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};
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};
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static void openpic_class_init(ObjectClass *klass, void *data)
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static void openpic_class_init(ObjectClass *oc, void *data)
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{
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(oc);
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SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
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k->init = openpic_init;
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dc->realize = openpic_realize;
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dc->props = openpic_properties;
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dc->props = openpic_properties;
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dc->reset = openpic_reset;
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dc->reset = openpic_reset;
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}
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}
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@ -1651,6 +1654,7 @@ static const TypeInfo openpic_info = {
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.name = TYPE_OPENPIC,
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.name = TYPE_OPENPIC,
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.parent = TYPE_SYS_BUS_DEVICE,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(OpenPICState),
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.instance_size = sizeof(OpenPICState),
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.instance_init = openpic_init,
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.class_init = openpic_class_init,
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.class_init = openpic_class_init,
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};
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};
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