riscv/opentitan: Connect the UART device
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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@ -97,6 +97,8 @@ static void riscv_lowrisc_ibex_soc_init(Object *obj)
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object_initialize_child(obj, "cpus", &s->cpus, TYPE_RISCV_HART_ARRAY);
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object_initialize_child(obj, "plic", &s->plic, TYPE_IBEX_PLIC);
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object_initialize_child(obj, "uart", &s->uart, TYPE_IBEX_UART);
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}
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static void riscv_lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp)
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@ -133,8 +135,27 @@ static void riscv_lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp)
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}
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->plic), 0, memmap[IBEX_PLIC].base);
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create_unimplemented_device("riscv.lowrisc.ibex.uart",
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memmap[IBEX_UART].base, memmap[IBEX_UART].size);
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/* UART */
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qdev_prop_set_chr(DEVICE(&(s->uart)), "chardev", serial_hd(0));
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sysbus_realize(SYS_BUS_DEVICE(&s->uart), &err);
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if (err != NULL) {
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error_propagate(errp, err);
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return;
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}
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart), 0, memmap[IBEX_UART].base);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart),
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0, qdev_get_gpio_in(DEVICE(&s->plic),
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IBEX_UART_TX_WATERMARK_IRQ));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart),
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1, qdev_get_gpio_in(DEVICE(&s->plic),
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IBEX_UART_RX_WATERMARK_IRQ));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart),
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2, qdev_get_gpio_in(DEVICE(&s->plic),
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IBEX_UART_TX_EMPTY_IRQ));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart),
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3, qdev_get_gpio_in(DEVICE(&s->plic),
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IBEX_UART_RX_OVERFLOW_IRQ));
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create_unimplemented_device("riscv.lowrisc.ibex.gpio",
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memmap[IBEX_GPIO].base, memmap[IBEX_GPIO].size);
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create_unimplemented_device("riscv.lowrisc.ibex.spi",
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@ -21,6 +21,7 @@
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#include "hw/riscv/riscv_hart.h"
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#include "hw/intc/ibex_plic.h"
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#include "hw/char/ibex_uart.h"
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#define TYPE_RISCV_IBEX_SOC "riscv.lowrisc.ibex.soc"
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#define RISCV_IBEX_SOC(obj) \
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@ -33,6 +34,7 @@ typedef struct LowRISCIbexSoCState {
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/*< public >*/
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RISCVHartArrayState cpus;
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IbexPlicState plic;
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IbexUartState uart;
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MemoryRegion flash_mem;
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MemoryRegion rom;
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@ -68,4 +70,15 @@ enum {
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IBEX_PADCTRL,
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};
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enum {
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IBEX_UART_RX_PARITY_ERR_IRQ = 0x28,
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IBEX_UART_RX_TIMEOUT_IRQ = 0x27,
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IBEX_UART_RX_BREAK_ERR_IRQ = 0x26,
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IBEX_UART_RX_FRAME_ERR_IRQ = 0x25,
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IBEX_UART_RX_OVERFLOW_IRQ = 0x24,
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IBEX_UART_TX_EMPTY_IRQ = 0x23,
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IBEX_UART_RX_WATERMARK_IRQ = 0x22,
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IBEX_UART_TX_WATERMARK_IRQ = 0x21,
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};
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#endif
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