target-i386: Add more Intel AVX-512 instructions support
Add more AVX512 feature bits, include AVX512DQ, AVX512IFMA, AVX512BW, AVX512VL, AVX512VBMI. Its spec can be found at: https://software.intel.com/sites/default/files/managed/b4/3a/319433-024.pdf Signed-off-by: Luwei Kang <luwei.kang@intel.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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@ -298,14 +298,18 @@ static const char *svm_feature_name[] = {
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};
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static const char *cpuid_7_0_ebx_feature_name[] = {
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"fsgsbase", "tsc_adjust", NULL, "bmi1", "hle", "avx2", NULL, "smep",
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"bmi2", "erms", "invpcid", "rtm", NULL, NULL, "mpx", NULL,
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"avx512f", NULL, "rdseed", "adx", "smap", NULL, "pcommit", "clflushopt",
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"clwb", NULL, "avx512pf", "avx512er", "avx512cd", NULL, NULL, NULL,
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"fsgsbase", "tsc_adjust", NULL, "bmi1",
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"hle", "avx2", NULL, "smep",
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"bmi2", "erms", "invpcid", "rtm",
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NULL, NULL, "mpx", NULL,
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"avx512f", "avx512dq", "rdseed", "adx",
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"smap", "avx512ifma", "pcommit", "clflushopt",
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"clwb", NULL, "avx512pf", "avx512er",
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"avx512cd", NULL, "avx512bw", "avx512vl",
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};
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static const char *cpuid_7_0_ecx_feature_name[] = {
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NULL, NULL, "umip", "pku",
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NULL, "avx512vbmi", "umip", "pku",
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"ospke", NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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@ -606,16 +606,21 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
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#define CPUID_7_0_EBX_RTM (1U << 11)
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#define CPUID_7_0_EBX_MPX (1U << 14)
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#define CPUID_7_0_EBX_AVX512F (1U << 16) /* AVX-512 Foundation */
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#define CPUID_7_0_EBX_AVX512DQ (1U << 17) /* AVX-512 Doubleword & Quadword Instrs */
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#define CPUID_7_0_EBX_RDSEED (1U << 18)
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#define CPUID_7_0_EBX_ADX (1U << 19)
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#define CPUID_7_0_EBX_SMAP (1U << 20)
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#define CPUID_7_0_EBX_AVX512IFMA (1U << 21) /* AVX-512 Integer Fused Multiply Add */
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#define CPUID_7_0_EBX_PCOMMIT (1U << 22) /* Persistent Commit */
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#define CPUID_7_0_EBX_CLFLUSHOPT (1U << 23) /* Flush a Cache Line Optimized */
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#define CPUID_7_0_EBX_CLWB (1U << 24) /* Cache Line Write Back */
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#define CPUID_7_0_EBX_AVX512PF (1U << 26) /* AVX-512 Prefetch */
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#define CPUID_7_0_EBX_AVX512ER (1U << 27) /* AVX-512 Exponential and Reciprocal */
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#define CPUID_7_0_EBX_AVX512CD (1U << 28) /* AVX-512 Conflict Detection */
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#define CPUID_7_0_EBX_AVX512BW (1U << 30) /* AVX-512 Byte and Word Instructions */
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#define CPUID_7_0_EBX_AVX512VL (1U << 31) /* AVX-512 Vector Length Extensions */
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#define CPUID_7_0_ECX_VBMI (1U << 1) /* AVX-512 Vector Byte Manipulation Instrs */
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#define CPUID_7_0_ECX_UMIP (1U << 2)
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#define CPUID_7_0_ECX_PKU (1U << 3)
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#define CPUID_7_0_ECX_OSPKE (1U << 4)
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