qemu-sparc update
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQEcBAABAgAGBQJY+ljvAAoJEFvCxW+uDzIfkDUH/09ijD3I+JxuwolZ8oY09Nhx ixnvIqylAMYr7BfRa7BxyaV+4lLIL5Irt/A9zND/7bYMdmW1QDLCCE3Qre8V8Q3z eu3XLfeYYigSYyPWrxJ4wVchxZO/V2CEd2oh0pgHGrI4ZZ27nAN8xsM3JkxtHDHm aDHCTZ6zU2NC2YC6NyD9+DB9PvuxQPlzTSdzNjSZQ9YN0fMJuV6z1Oez+gibM+rV l+pG/kN5g+QboLHyJbXdiSSW40N5PyiSD7hYO9RWEKmlbktfVKkR3h+M0B1eJmyc gtl6bgQrBO0zP4cWOR/SBZj8223vkzHll342VSYw2R1eLdkJCuNvl6jXssKwVPY= =hwYF -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-signed' into staging qemu-sparc update # gpg: Signature made Fri 21 Apr 2017 20:09:35 BST # gpg: using RSA key 0x5BC2C56FAE0F321F # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-sparc-signed: tcx: switch to load_image_mr() and remove prom_addr hack tcx: use tcx_set_dirty() for accelerated ops tcx: remove primitives for non-32-bit surfaces tcx: remove TARGET_PAGE_SIZE from tcx24_update_display() tcx: remove TARGET_PAGE_SIZE from tcx_update_display() tcx: remove page24 and cpage from tcx24_update_display() tcx: alter tcx24_reset_dirty() to accept address and length parameters tcx: alter tcx24_check_dirty() to accept address and length parameters tcx: ensure tcx_set_dirty() also invalidates the 24-bit plane and cplane tcx: alter tcx_set_dirty() to accept address and length parameters cg3: switch to load_image_mr() and remove prom-addr hack cg3: fix up size parameter for memory_region_get_dirty() cg3: remove TARGET_PAGE_SIZE rounding on dirty page detection Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
cd1ea50895
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@ -26,7 +26,6 @@
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu-common.h"
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#include "cpu.h"
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#include "qemu/error-report.h"
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#include "ui/console.h"
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#include "hw/sysbus.h"
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@ -114,8 +113,8 @@ static void cg3_update_display(void *opaque)
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for (y = 0; y < height; y++) {
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int update = s->full_update;
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page = (y * width) & TARGET_PAGE_MASK;
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update |= memory_region_get_dirty(&s->vram_mem, page, page + width,
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page = y * width;
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update |= memory_region_get_dirty(&s->vram_mem, page, width,
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DIRTY_MEMORY_VGA);
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if (update) {
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if (y_start < 0) {
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@ -148,8 +147,7 @@ static void cg3_update_display(void *opaque)
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}
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if (page_max >= page_min) {
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memory_region_reset_dirty(&s->vram_mem,
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page_min, page_max - page_min + TARGET_PAGE_SIZE,
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DIRTY_MEMORY_VGA);
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page_min, page_max - page_min, DIRTY_MEMORY_VGA);
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}
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/* vsync interrupt? */
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if (s->regs[0] & CG3_CR_ENABLE_INTS) {
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@ -305,8 +303,7 @@ static void cg3_realizefn(DeviceState *dev, Error **errp)
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vmstate_register_ram_global(&s->rom);
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fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, CG3_ROM_FILE);
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if (fcode_filename) {
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ret = load_image_targphys(fcode_filename, s->prom_addr,
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FCODE_MAX_ROM_SIZE);
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ret = load_image_mr(fcode_filename, &s->rom);
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g_free(fcode_filename);
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if (ret < 0 || ret > FCODE_MAX_ROM_SIZE) {
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error_report("cg3: could not load prom '%s'", CG3_ROM_FILE);
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@ -371,7 +368,6 @@ static Property cg3_properties[] = {
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DEFINE_PROP_UINT16("width", CG3State, width, -1),
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DEFINE_PROP_UINT16("height", CG3State, height, -1),
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DEFINE_PROP_UINT16("depth", CG3State, depth, -1),
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DEFINE_PROP_UINT64("prom-addr", CG3State, prom_addr, -1),
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DEFINE_PROP_END_OF_LIST(),
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};
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298
hw/display/tcx.c
298
hw/display/tcx.c
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@ -25,7 +25,6 @@
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu-common.h"
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#include "cpu.h" /* FIXME shouldn't use TARGET_PAGE_SIZE */
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#include "ui/console.h"
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#include "ui/pixel_ops.h"
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#include "hw/loader.h"
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@ -93,41 +92,46 @@ typedef struct TCXState {
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uint16_t cursy;
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} TCXState;
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static void tcx_set_dirty(TCXState *s)
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static void tcx_set_dirty(TCXState *s, ram_addr_t addr, int len)
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{
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memory_region_set_dirty(&s->vram_mem, 0, MAXX * MAXY);
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memory_region_set_dirty(&s->vram_mem, addr, len);
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if (s->depth == 24) {
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memory_region_set_dirty(&s->vram_mem, s->vram24_offset + addr * 4,
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len * 4);
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memory_region_set_dirty(&s->vram_mem, s->cplane_offset + addr * 4,
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len * 4);
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}
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}
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static inline int tcx24_check_dirty(TCXState *s, ram_addr_t page,
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ram_addr_t page24, ram_addr_t cpage)
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static int tcx_check_dirty(TCXState *s, ram_addr_t addr, int len)
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{
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int ret;
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ret = memory_region_get_dirty(&s->vram_mem, page, TARGET_PAGE_SIZE,
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DIRTY_MEMORY_VGA);
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ret |= memory_region_get_dirty(&s->vram_mem, page24, TARGET_PAGE_SIZE * 4,
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DIRTY_MEMORY_VGA);
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ret |= memory_region_get_dirty(&s->vram_mem, cpage, TARGET_PAGE_SIZE * 4,
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DIRTY_MEMORY_VGA);
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ret = memory_region_get_dirty(&s->vram_mem, addr, len, DIRTY_MEMORY_VGA);
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if (s->depth == 24) {
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ret |= memory_region_get_dirty(&s->vram_mem,
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s->vram24_offset + addr * 4, len * 4,
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DIRTY_MEMORY_VGA);
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ret |= memory_region_get_dirty(&s->vram_mem,
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s->cplane_offset + addr * 4, len * 4,
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DIRTY_MEMORY_VGA);
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}
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return ret;
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}
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static inline void tcx24_reset_dirty(TCXState *ts, ram_addr_t page_min,
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ram_addr_t page_max, ram_addr_t page24,
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ram_addr_t cpage)
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static void tcx_reset_dirty(TCXState *s, ram_addr_t addr, int len)
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{
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memory_region_reset_dirty(&ts->vram_mem,
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page_min,
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(page_max - page_min) + TARGET_PAGE_SIZE,
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DIRTY_MEMORY_VGA);
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memory_region_reset_dirty(&ts->vram_mem,
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page24 + page_min * 4,
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(page_max - page_min) * 4 + TARGET_PAGE_SIZE,
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DIRTY_MEMORY_VGA);
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memory_region_reset_dirty(&ts->vram_mem,
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cpage + page_min * 4,
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(page_max - page_min) * 4 + TARGET_PAGE_SIZE,
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DIRTY_MEMORY_VGA);
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memory_region_reset_dirty(&s->vram_mem, addr, len, DIRTY_MEMORY_VGA);
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if (s->depth == 24) {
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memory_region_reset_dirty(&s->vram_mem, s->vram24_offset + addr * 4,
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len * 4, DIRTY_MEMORY_VGA);
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memory_region_reset_dirty(&s->vram_mem, s->cplane_offset + addr * 4,
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len * 4, DIRTY_MEMORY_VGA);
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}
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}
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static void update_palette_entries(TCXState *s, int start, int end)
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@ -136,27 +140,14 @@ static void update_palette_entries(TCXState *s, int start, int end)
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int i;
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for (i = start; i < end; i++) {
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switch (surface_bits_per_pixel(surface)) {
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default:
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case 8:
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s->palette[i] = rgb_to_pixel8(s->r[i], s->g[i], s->b[i]);
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break;
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case 15:
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s->palette[i] = rgb_to_pixel15(s->r[i], s->g[i], s->b[i]);
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break;
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case 16:
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s->palette[i] = rgb_to_pixel16(s->r[i], s->g[i], s->b[i]);
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break;
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case 32:
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if (is_surface_bgr(surface)) {
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s->palette[i] = rgb_to_pixel32bgr(s->r[i], s->g[i], s->b[i]);
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} else {
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s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]);
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}
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break;
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if (is_surface_bgr(surface)) {
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s->palette[i] = rgb_to_pixel32bgr(s->r[i], s->g[i], s->b[i]);
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} else {
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s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]);
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}
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break;
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}
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tcx_set_dirty(s);
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tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem));
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}
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static void tcx_draw_line32(TCXState *s1, uint8_t *d,
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@ -172,31 +163,6 @@ static void tcx_draw_line32(TCXState *s1, uint8_t *d,
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}
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}
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static void tcx_draw_line16(TCXState *s1, uint8_t *d,
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const uint8_t *s, int width)
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{
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int x;
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uint8_t val;
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uint16_t *p = (uint16_t *)d;
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for (x = 0; x < width; x++) {
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val = *s++;
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*p++ = s1->palette[val];
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}
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}
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static void tcx_draw_line8(TCXState *s1, uint8_t *d,
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const uint8_t *s, int width)
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{
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int x;
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uint8_t val;
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for(x = 0; x < width; x++) {
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val = *s++;
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*d++ = s1->palette[val];
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}
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}
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static void tcx_draw_cursor32(TCXState *s1, uint8_t *d,
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int y, int width)
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{
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@ -223,57 +189,6 @@ static void tcx_draw_cursor32(TCXState *s1, uint8_t *d,
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}
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}
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static void tcx_draw_cursor16(TCXState *s1, uint8_t *d,
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int y, int width)
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{
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int x, len;
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uint32_t mask, bits;
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uint16_t *p = (uint16_t *)d;
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y = y - s1->cursy;
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mask = s1->cursmask[y];
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bits = s1->cursbits[y];
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len = MIN(width - s1->cursx, 32);
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p = &p[s1->cursx];
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for (x = 0; x < len; x++) {
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if (mask & 0x80000000) {
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if (bits & 0x80000000) {
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*p = s1->palette[259];
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} else {
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*p = s1->palette[258];
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}
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}
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p++;
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mask <<= 1;
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bits <<= 1;
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}
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}
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static void tcx_draw_cursor8(TCXState *s1, uint8_t *d,
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int y, int width)
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{
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int x, len;
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uint32_t mask, bits;
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y = y - s1->cursy;
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mask = s1->cursmask[y];
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bits = s1->cursbits[y];
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len = MIN(width - s1->cursx, 32);
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d = &d[s1->cursx];
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for (x = 0; x < len; x++) {
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if (mask & 0x80000000) {
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if (bits & 0x80000000) {
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*d = s1->palette[259];
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} else {
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*d = s1->palette[258];
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}
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}
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d++;
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mask <<= 1;
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bits <<= 1;
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}
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}
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/*
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XXX Could be much more optimal:
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* detect if line/page/whole screen is in 24 bit mode
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@ -322,10 +237,8 @@ static void tcx_update_display(void *opaque)
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ram_addr_t page, page_min, page_max;
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int y, y_start, dd, ds;
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uint8_t *d, *s;
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void (*f)(TCXState *s1, uint8_t *dst, const uint8_t *src, int width);
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void (*fc)(TCXState *s1, uint8_t *dst, int y, int width);
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if (surface_bits_per_pixel(surface) == 0) {
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if (surface_bits_per_pixel(surface) != 32) {
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return;
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}
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@ -338,29 +251,9 @@ static void tcx_update_display(void *opaque)
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dd = surface_stride(surface);
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ds = 1024;
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switch (surface_bits_per_pixel(surface)) {
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case 32:
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f = tcx_draw_line32;
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fc = tcx_draw_cursor32;
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break;
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case 15:
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case 16:
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f = tcx_draw_line16;
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fc = tcx_draw_cursor16;
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break;
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default:
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case 8:
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f = tcx_draw_line8;
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fc = tcx_draw_cursor8;
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break;
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case 0:
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return;
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}
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memory_region_sync_dirty_bitmap(&ts->vram_mem);
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for (y = 0; y < ts->height; page += TARGET_PAGE_SIZE) {
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if (memory_region_get_dirty(&ts->vram_mem, page, TARGET_PAGE_SIZE,
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DIRTY_MEMORY_VGA)) {
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for (y = 0; y < ts->height; y++, page += ds) {
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if (tcx_check_dirty(ts, page, ds)) {
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if (y_start < 0)
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y_start = y;
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if (page < page_min)
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|
@ -368,37 +261,10 @@ static void tcx_update_display(void *opaque)
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if (page > page_max)
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page_max = page;
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f(ts, d, s, ts->width);
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tcx_draw_line32(ts, d, s, ts->width);
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if (y >= ts->cursy && y < ts->cursy + 32 && ts->cursx < ts->width) {
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fc(ts, d, y, ts->width);
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tcx_draw_cursor32(ts, d, y, ts->width);
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}
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d += dd;
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s += ds;
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y++;
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f(ts, d, s, ts->width);
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if (y >= ts->cursy && y < ts->cursy + 32 && ts->cursx < ts->width) {
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fc(ts, d, y, ts->width);
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}
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d += dd;
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s += ds;
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y++;
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f(ts, d, s, ts->width);
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if (y >= ts->cursy && y < ts->cursy + 32 && ts->cursx < ts->width) {
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fc(ts, d, y, ts->width);
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}
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d += dd;
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s += ds;
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y++;
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f(ts, d, s, ts->width);
|
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if (y >= ts->cursy && y < ts->cursy + 32 && ts->cursx < ts->width) {
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fc(ts, d, y, ts->width);
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}
|
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d += dd;
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s += ds;
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y++;
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} else {
|
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if (y_start >= 0) {
|
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/* flush to display */
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|
@ -406,10 +272,9 @@ static void tcx_update_display(void *opaque)
|
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ts->width, y - y_start);
|
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y_start = -1;
|
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}
|
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d += dd * 4;
|
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s += ds * 4;
|
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y += 4;
|
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}
|
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s += ds;
|
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d += dd;
|
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}
|
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if (y_start >= 0) {
|
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/* flush to display */
|
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|
@ -418,10 +283,7 @@ static void tcx_update_display(void *opaque)
|
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}
|
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/* reset modified pages */
|
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if (page_max >= page_min) {
|
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memory_region_reset_dirty(&ts->vram_mem,
|
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page_min,
|
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(page_max - page_min) + TARGET_PAGE_SIZE,
|
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DIRTY_MEMORY_VGA);
|
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tcx_reset_dirty(ts, page_min, page_max - page_min);
|
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}
|
||||
}
|
||||
|
||||
|
@ -429,7 +291,7 @@ static void tcx24_update_display(void *opaque)
|
|||
{
|
||||
TCXState *ts = opaque;
|
||||
DisplaySurface *surface = qemu_console_surface(ts->con);
|
||||
ram_addr_t page, page_min, page_max, cpage, page24;
|
||||
ram_addr_t page, page_min, page_max;
|
||||
int y, y_start, dd, ds;
|
||||
uint8_t *d, *s;
|
||||
uint32_t *cptr, *s24;
|
||||
|
@ -439,8 +301,6 @@ static void tcx24_update_display(void *opaque)
|
|||
}
|
||||
|
||||
page = 0;
|
||||
page24 = ts->vram24_offset;
|
||||
cpage = ts->cplane_offset;
|
||||
y_start = -1;
|
||||
page_min = -1;
|
||||
page_max = 0;
|
||||
|
@ -452,9 +312,8 @@ static void tcx24_update_display(void *opaque)
|
|||
ds = 1024;
|
||||
|
||||
memory_region_sync_dirty_bitmap(&ts->vram_mem);
|
||||
for (y = 0; y < ts->height; page += TARGET_PAGE_SIZE,
|
||||
page24 += TARGET_PAGE_SIZE, cpage += TARGET_PAGE_SIZE) {
|
||||
if (tcx24_check_dirty(ts, page, page24, cpage)) {
|
||||
for (y = 0; y < ts->height; y++, page += ds) {
|
||||
if (tcx_check_dirty(ts, page, ds)) {
|
||||
if (y_start < 0)
|
||||
y_start = y;
|
||||
if (page < page_min)
|
||||
|
@ -465,38 +324,6 @@ static void tcx24_update_display(void *opaque)
|
|||
if (y >= ts->cursy && y < ts->cursy+32 && ts->cursx < ts->width) {
|
||||
tcx_draw_cursor32(ts, d, y, ts->width);
|
||||
}
|
||||
d += dd;
|
||||
s += ds;
|
||||
cptr += ds;
|
||||
s24 += ds;
|
||||
y++;
|
||||
tcx24_draw_line32(ts, d, s, ts->width, cptr, s24);
|
||||
if (y >= ts->cursy && y < ts->cursy+32 && ts->cursx < ts->width) {
|
||||
tcx_draw_cursor32(ts, d, y, ts->width);
|
||||
}
|
||||
d += dd;
|
||||
s += ds;
|
||||
cptr += ds;
|
||||
s24 += ds;
|
||||
y++;
|
||||
tcx24_draw_line32(ts, d, s, ts->width, cptr, s24);
|
||||
if (y >= ts->cursy && y < ts->cursy+32 && ts->cursx < ts->width) {
|
||||
tcx_draw_cursor32(ts, d, y, ts->width);
|
||||
}
|
||||
d += dd;
|
||||
s += ds;
|
||||
cptr += ds;
|
||||
s24 += ds;
|
||||
y++;
|
||||
tcx24_draw_line32(ts, d, s, ts->width, cptr, s24);
|
||||
if (y >= ts->cursy && y < ts->cursy+32 && ts->cursx < ts->width) {
|
||||
tcx_draw_cursor32(ts, d, y, ts->width);
|
||||
}
|
||||
d += dd;
|
||||
s += ds;
|
||||
cptr += ds;
|
||||
s24 += ds;
|
||||
y++;
|
||||
} else {
|
||||
if (y_start >= 0) {
|
||||
/* flush to display */
|
||||
|
@ -504,12 +331,11 @@ static void tcx24_update_display(void *opaque)
|
|||
ts->width, y - y_start);
|
||||
y_start = -1;
|
||||
}
|
||||
d += dd * 4;
|
||||
s += ds * 4;
|
||||
cptr += ds * 4;
|
||||
s24 += ds * 4;
|
||||
y += 4;
|
||||
}
|
||||
d += dd;
|
||||
s += ds;
|
||||
cptr += ds;
|
||||
s24 += ds;
|
||||
}
|
||||
if (y_start >= 0) {
|
||||
/* flush to display */
|
||||
|
@ -518,7 +344,7 @@ static void tcx24_update_display(void *opaque)
|
|||
}
|
||||
/* reset modified pages */
|
||||
if (page_max >= page_min) {
|
||||
tcx24_reset_dirty(ts, page_min, page_max, page24, cpage);
|
||||
tcx_reset_dirty(ts, page_min, page_max - page_min);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -526,7 +352,7 @@ static void tcx_invalidate_display(void *opaque)
|
|||
{
|
||||
TCXState *s = opaque;
|
||||
|
||||
tcx_set_dirty(s);
|
||||
tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem));
|
||||
qemu_console_resize(s->con, s->width, s->height);
|
||||
}
|
||||
|
||||
|
@ -534,7 +360,7 @@ static void tcx24_invalidate_display(void *opaque)
|
|||
{
|
||||
TCXState *s = opaque;
|
||||
|
||||
tcx_set_dirty(s);
|
||||
tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem));
|
||||
qemu_console_resize(s->con, s->width, s->height);
|
||||
}
|
||||
|
||||
|
@ -543,7 +369,7 @@ static int vmstate_tcx_post_load(void *opaque, int version_id)
|
|||
TCXState *s = opaque;
|
||||
|
||||
update_palette_entries(s, 0, 256);
|
||||
tcx_set_dirty(s);
|
||||
tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem));
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -699,7 +525,7 @@ static void tcx_stip_writel(void *opaque, hwaddr addr,
|
|||
val <<= 1;
|
||||
}
|
||||
}
|
||||
memory_region_set_dirty(&s->vram_mem, addr, 32);
|
||||
tcx_set_dirty(s, addr, 32);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -732,7 +558,7 @@ static void tcx_rstip_writel(void *opaque, hwaddr addr,
|
|||
val <<= 1;
|
||||
}
|
||||
}
|
||||
memory_region_set_dirty(&s->vram_mem, addr, 32);
|
||||
tcx_set_dirty(s, addr, 32);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -790,7 +616,7 @@ static void tcx_blit_writel(void *opaque, hwaddr addr,
|
|||
memcpy(&s->vram24[addr], &s->vram24[adsr], len * 4);
|
||||
}
|
||||
}
|
||||
memory_region_set_dirty(&s->vram_mem, addr, len);
|
||||
tcx_set_dirty(s, addr, len);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -824,7 +650,7 @@ static void tcx_rblit_writel(void *opaque, hwaddr addr,
|
|||
memcpy(&s->cplane[addr], &s->cplane[adsr], len * 4);
|
||||
}
|
||||
}
|
||||
memory_region_set_dirty(&s->vram_mem, addr, len);
|
||||
tcx_set_dirty(s, addr, len);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -861,7 +687,7 @@ static void tcx_invalidate_cursor_position(TCXState *s)
|
|||
start = ymin * 1024;
|
||||
end = ymax * 1024;
|
||||
|
||||
memory_region_set_dirty(&s->vram_mem, start, end-start);
|
||||
tcx_set_dirty(s, start, end - start);
|
||||
}
|
||||
|
||||
static uint64_t tcx_thc_readl(void *opaque, hwaddr addr,
|
||||
|
@ -1017,8 +843,7 @@ static void tcx_realizefn(DeviceState *dev, Error **errp)
|
|||
vmstate_register_ram_global(&s->rom);
|
||||
fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, TCX_ROM_FILE);
|
||||
if (fcode_filename) {
|
||||
ret = load_image_targphys(fcode_filename, s->prom_addr,
|
||||
FCODE_MAX_ROM_SIZE);
|
||||
ret = load_image_mr(fcode_filename, &s->rom);
|
||||
g_free(fcode_filename);
|
||||
if (ret < 0 || ret > FCODE_MAX_ROM_SIZE) {
|
||||
error_report("tcx: could not load prom '%s'", TCX_ROM_FILE);
|
||||
|
@ -1076,7 +901,6 @@ static Property tcx_properties[] = {
|
|||
DEFINE_PROP_UINT16("width", TCXState, width, -1),
|
||||
DEFINE_PROP_UINT16("height", TCXState, height, -1),
|
||||
DEFINE_PROP_UINT16("depth", TCXState, depth, -1),
|
||||
DEFINE_PROP_UINT64("prom_addr", TCXState, prom_addr, -1),
|
||||
DEFINE_PROP_END_OF_LIST(),
|
||||
};
|
||||
|
||||
|
|
|
@ -491,7 +491,6 @@ static void tcx_init(hwaddr addr, qemu_irq irq, int vram_size, int width,
|
|||
qdev_prop_set_uint16(dev, "width", width);
|
||||
qdev_prop_set_uint16(dev, "height", height);
|
||||
qdev_prop_set_uint16(dev, "depth", depth);
|
||||
qdev_prop_set_uint64(dev, "prom_addr", addr);
|
||||
qdev_init_nofail(dev);
|
||||
s = SYS_BUS_DEVICE(dev);
|
||||
|
||||
|
@ -544,7 +543,6 @@ static void cg3_init(hwaddr addr, qemu_irq irq, int vram_size, int width,
|
|||
qdev_prop_set_uint16(dev, "width", width);
|
||||
qdev_prop_set_uint16(dev, "height", height);
|
||||
qdev_prop_set_uint16(dev, "depth", depth);
|
||||
qdev_prop_set_uint64(dev, "prom-addr", addr);
|
||||
qdev_init_nofail(dev);
|
||||
s = SYS_BUS_DEVICE(dev);
|
||||
|
||||
|
|
Loading…
Reference in a new issue