target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI
Define a dummy version of the AArch64 OSLAR_EL1 system register which just ignores writes. Linux will always write to this (it is the OS lock used for debugging), but we don't support debug. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
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@ -1738,6 +1738,10 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
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{ .name = "MDSCR_EL1", .state = ARM_CP_STATE_AA64,
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{ .name = "MDSCR_EL1", .state = ARM_CP_STATE_AA64,
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.opc0 = 2, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 2,
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.opc0 = 2, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 2,
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.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
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.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
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/* We define a dummy WI OSLAR_EL1, because Linux writes to it. */
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{ .name = "OSLAR_EL1", .state = ARM_CP_STATE_AA64,
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.opc0 = 2, .opc1 = 0, .crn = 1, .crm = 0, .opc2 = 4,
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.access = PL1_W, .type = ARM_CP_NOP },
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REGINFO_SENTINEL
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REGINFO_SENTINEL
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};
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};
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