target/xtensa improvements for v5.0:
- fix ps.ring use in MPU configs; - use MPU background map from the configuration overlay. -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEK2eFS5jlMn3N6xfYUfnMkfg/oEQFAl4TkeETHGpjbXZia2Jj QGdtYWlsLmNvbQAKCRBR+cyR+D+gRJNkD/99d3a+ounDKt1yADRvJCt2wYdjAltC eiuxqzjWzRWyY6rlTwpMuvpVAS3Gz0m1rF38PTtfARRorLkvgEMVELsQ0Dn7FNq9 c4yd8dUBFi6G2fXVshzUJe4y9YUENg6OPwO9DAltqwIm8V1XTwNhKvFyBrg3l8NW JJp8USCZH1JAvmcpB8T5RM7K2oBOLFIZurLFUNlUPlcdt968wIbDYQLCpz8olpc0 Jd5LqtV+IFfWwbeUOkSD2iM7kcD+HSPZZUbcokCkADLHHWqgMgQAXBScj42yA8O/ Vt7SSPAZm0H+VSQPdSH2R8W4CRne4txtIdk7z7xa8xqBntDmyjvaJv4gqzeW5XP0 DKbLj6UYmztCxwGKcS+JU54sVmMxrioVWFtLqRdF6d7/rEXXP7OM0wEbdvw8nccE aTLHnMV1MhmycA1PSdB06gGzfDVG6mkysftoYo2rZdTis4XR3WUxcayZyMgQnQHu 7zJn3L5FE0N/5eebrigqOMinm9ukz6SKj+fJY+qJCEGRrZW64EsDCsgrpKRBuXRL Idq1mi/hmm1GjPOrp1U2y2JZ1sz62p9GyabzzYRGSbyUl+ERlwx6QOpKUOUvvlyq P78cvdiLsOSO5rG3j1t83IhVH1KMc21b3L/BupyUEqSSFFx6rvS5KEor6lgZq180 MbOkKFUWswLGGw== =G4de -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/xtensa/tags/20200106-xtensa' into staging target/xtensa improvements for v5.0: - fix ps.ring use in MPU configs; - use MPU background map from the configuration overlay. # gpg: Signature made Mon 06 Jan 2020 20:00:33 GMT # gpg: using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044 # gpg: issuer "jcmvbkbc@gmail.com" # gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown] # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" [full] # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" [full] # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20200106-xtensa: target/xtensa: use MPU background map from core configuration target/xtensa: import xtensa/config/core-isa.h target/xtensa: fix ps.ring use in MPU configs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
cdbc5c51c8
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@ -645,7 +645,9 @@ static inline int xtensa_get_cintlevel(const CPUXtensaState *env)
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static inline int xtensa_get_ring(const CPUXtensaState *env)
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{
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if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
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if (xtensa_option_bits_enabled(env->config,
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XTENSA_OPTION_BIT(XTENSA_OPTION_MMU) |
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XTENSA_OPTION_BIT(XTENSA_OPTION_MPU))) {
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return (env->sregs[PS] & PS_RING) >> PS_RING_SHIFT;
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} else {
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return 0;
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@ -654,7 +656,9 @@ static inline int xtensa_get_ring(const CPUXtensaState *env)
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static inline int xtensa_get_cring(const CPUXtensaState *env)
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{
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if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU) &&
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if (xtensa_option_bits_enabled(env->config,
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XTENSA_OPTION_BIT(XTENSA_OPTION_MMU) |
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XTENSA_OPTION_BIT(XTENSA_OPTION_MPU)) &&
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(env->sregs[PS] & PS_EXCM) == 0) {
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return (env->sregs[PS] & PS_RING) >> PS_RING_SHIFT;
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} else {
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@ -19,8 +19,9 @@ exit
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[ $# -ge 3 ] && FREQ="$3"
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mkdir -p "$TARGET"
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tar -xf "$OVERLAY" -C "$TARGET" --strip-components=1 \
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--xform='s/core/core-isa/' config/core.h
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tar -xf "$OVERLAY" -C "$TARGET" --strip-components=2 \
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xtensa/config/core-isa.h \
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xtensa/config/core-matmap.h
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tar -xf "$OVERLAY" -O gdb/xtensa-config.c | \
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sed -n '1,/*\//p;/XTREG/,/XTREG_END/p' > "$TARGET"/gdb-config.inc.c
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#
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@ -44,6 +45,7 @@ cat <<EOF > "${TARGET}.c"
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#include "qemu/host-utils.h"
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#include "core-$NAME/core-isa.h"
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#include "core-$NAME/core-matmap.h"
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#include "overlay_tool.h"
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#define xtensa_modules xtensa_modules_$NAME
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@ -373,15 +373,28 @@
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#elif XCHAL_HAVE_MPU
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#ifndef XTENSA_MPU_BG_MAP
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#ifdef XCHAL_MPU_BACKGROUND_MAP
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#define XCHAL_MPU_BGMAP(s, vaddr_start, vaddr_last, rights, memtype, x...) \
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{ .vaddr = (vaddr_start), .attr = ((rights) << 8) | ((memtype) << 12), },
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#define XTENSA_MPU_BG_MAP (xtensa_mpu_entry []){\
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XCHAL_MPU_BACKGROUND_MAP(0) \
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}
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#define XTENSA_MPU_BG_MAP_ENTRIES XCHAL_MPU_BACKGROUND_ENTRIES
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#else
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#define XTENSA_MPU_BG_MAP (xtensa_mpu_entry []){\
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{ .vaddr = 0, .attr = 0x00006700, }, \
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}
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#define XTENSA_MPU_BG_MAP_ENTRIES 1
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#endif
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#endif
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#define TLB_SECTION \
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.mpu_align = XCHAL_MPU_ALIGN, \
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.n_mpu_fg_segments = XCHAL_MPU_ENTRIES, \
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.n_mpu_bg_segments = 1, \
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.n_mpu_bg_segments = XTENSA_MPU_BG_MAP_ENTRIES, \
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.mpu_bg = XTENSA_MPU_BG_MAP
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#ifndef XCHAL_SYSROM0_PADDR
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@ -2713,7 +2713,8 @@ static void translate_wsr_ps(DisasContext *dc, const OpcodeArg arg[],
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uint32_t mask = PS_WOE | PS_CALLINC | PS_OWB |
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PS_UM | PS_EXCM | PS_INTLEVEL;
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if (option_enabled(dc, XTENSA_OPTION_MMU)) {
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if (option_enabled(dc, XTENSA_OPTION_MMU) ||
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option_enabled(dc, XTENSA_OPTION_MPU)) {
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mask |= PS_RING;
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}
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tcg_gen_andi_i32(cpu_SR[par[0]], arg[0].in, mask);
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