hw/riscv: microchip_pfsoc: Connect the SYSREG module

Previously SYSREG was created as an unimplemented device. Now that
we have a simple SYSREG module, connect it.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1603863010-15807-8-git-send-email-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Bin Meng 2020-10-28 13:30:07 +08:00 committed by Alistair Francis
parent 0f25065cb6
commit cdd58c70fb
3 changed files with 9 additions and 3 deletions

View file

@ -7,6 +7,7 @@ config MICROCHIP_PFSOC
select MCHP_PFSOC_DMC
select MCHP_PFSOC_IOSCB
select MCHP_PFSOC_MMUART
select MCHP_PFSOC_SYSREG
select MSI_NONBROKEN
select SIFIVE_CLINT
select SIFIVE_PDMA

View file

@ -153,6 +153,9 @@ static void microchip_pfsoc_soc_instance_init(Object *obj)
object_initialize_child(obj, "dma-controller", &s->dma,
TYPE_SIFIVE_PDMA);
object_initialize_child(obj, "sysreg", &s->sysreg,
TYPE_MCHP_PFSOC_SYSREG);
object_initialize_child(obj, "ddr-sgmii-phy", &s->ddr_sgmii_phy,
TYPE_MCHP_PFSOC_DDR_SGMII_PHY);
object_initialize_child(obj, "ddr-cfg", &s->ddr_cfg,
@ -280,9 +283,9 @@ static void microchip_pfsoc_soc_realize(DeviceState *dev, Error **errp)
}
/* SYSREG */
create_unimplemented_device("microchip.pfsoc.sysreg",
memmap[MICROCHIP_PFSOC_SYSREG].base,
memmap[MICROCHIP_PFSOC_SYSREG].size);
sysbus_realize(SYS_BUS_DEVICE(&s->sysreg), errp);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->sysreg), 0,
memmap[MICROCHIP_PFSOC_SYSREG].base);
/* MPUCFG */
create_unimplemented_device("microchip.pfsoc.mpucfg",

View file

@ -26,6 +26,7 @@
#include "hw/dma/sifive_pdma.h"
#include "hw/misc/mchp_pfsoc_dmc.h"
#include "hw/misc/mchp_pfsoc_ioscb.h"
#include "hw/misc/mchp_pfsoc_sysreg.h"
#include "hw/net/cadence_gem.h"
#include "hw/sd/cadence_sdhci.h"
@ -47,6 +48,7 @@ typedef struct MicrochipPFSoCState {
MchpPfSoCMMUartState *serial2;
MchpPfSoCMMUartState *serial3;
MchpPfSoCMMUartState *serial4;
MchpPfSoCSysregState sysreg;
SiFivePDMAState dma;
CadenceGEMState gem0;
CadenceGEMState gem1;