riscv/virt: Manually define the machine

Instead of using the DEFINE_MACHINE() macro to define the machine let's
do it manually. This allows us to use the machine object to create
RISCVVirtState. This is required to add children and aliases to the
machine.

This patch is no functional change.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
This commit is contained in:
Alistair Francis 2019-10-08 16:32:22 -07:00 committed by Palmer Dabbelt
parent fc41ae230e
commit cdfc19e456
No known key found for this signature in database
GPG key ID: EF4CA1502CCBAB41
2 changed files with 30 additions and 7 deletions

View file

@ -360,8 +360,7 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem,
static void riscv_virt_board_init(MachineState *machine)
{
const struct MemmapEntry *memmap = virt_memmap;
RISCVVirtState *s = g_new0(RISCVVirtState, 1);
RISCVVirtState *s = RISCV_VIRT_MACHINE(machine);
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *main_mem = g_new(MemoryRegion, 1);
MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
@ -497,12 +496,31 @@ static void riscv_virt_board_init(MachineState *machine)
g_free(plic_hart_config);
}
static void riscv_virt_board_machine_init(MachineClass *mc)
static void riscv_virt_machine_instance_init(Object *obj)
{
mc->desc = "RISC-V VirtIO Board (Privileged ISA v1.10)";
}
static void riscv_virt_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
mc->desc = "RISC-V VirtIO board";
mc->init = riscv_virt_board_init;
mc->max_cpus = 8; /* hardcoded limit in BBL */
mc->max_cpus = 8;
mc->default_cpu_type = VIRT_CPU;
}
DEFINE_MACHINE("virt", riscv_virt_board_machine_init)
static const TypeInfo riscv_virt_machine_typeinfo = {
.name = MACHINE_TYPE_NAME("virt"),
.parent = TYPE_MACHINE,
.class_init = riscv_virt_machine_class_init,
.instance_init = riscv_virt_machine_instance_init,
.instance_size = sizeof(RISCVVirtState),
};
static void riscv_virt_machine_init_register_types(void)
{
type_register_static(&riscv_virt_machine_typeinfo);
}
type_init(riscv_virt_machine_init_register_types)

View file

@ -22,13 +22,18 @@
#include "hw/riscv/riscv_hart.h"
#include "hw/sysbus.h"
#define TYPE_RISCV_VIRT_MACHINE MACHINE_TYPE_NAME("virt")
#define RISCV_VIRT_MACHINE(obj) \
OBJECT_CHECK(RISCVVirtState, (obj), TYPE_RISCV_VIRT_MACHINE)
typedef struct {
/*< private >*/
SysBusDevice parent_obj;
MachineState parent;
/*< public >*/
RISCVHartArrayState soc;
DeviceState *plic;
void *fdt;
int fdt_size;
} RISCVVirtState;