Fix sci irq set when acpi timer about to wrap (Dor Laor, Yaniv Kamay).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4258 c046a42c-6fe2-441c-8c8c-71466251a162
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b80059146a
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74
hw/acpi.c
74
hw/acpi.c
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@ -50,12 +50,15 @@ typedef struct PIIX4PMState {
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uint8_t smb_data[32];
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uint8_t smb_index;
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qemu_irq irq;
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int64_t pmtmr;
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} PIIX4PMState;
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#define RTC_EN (1 << 10)
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#define PWRBTN_EN (1 << 8)
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#define GBL_EN (1 << 5)
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#define TMROF_EN (1 << 0)
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#define TIMER_OVERFLOW_CNT (1 << 23)
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#define TIMER_MASK 0xffffffLL
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#define SCI_EN (1 << 0)
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@ -74,47 +77,61 @@ typedef struct PIIX4PMState {
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PIIX4PMState *pm_state;
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static void update_pmtmr(PIIX4PMState *s)
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{
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int64_t pmtmr;
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pmtmr = muldiv64(qemu_get_clock(vm_clock), PM_FREQ, ticks_per_sec)
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& TIMER_MASK;
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if (!(s->pmsts & TMROF_EN)) {
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if ((pmtmr ^ s->pmtmr) & TIMER_OVERFLOW_CNT) {
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s->pmsts |= TMROF_EN;
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if (s->pmen & TMROF_EN)
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qemu_set_irq(s->irq, 1);
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} else {
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/* Calculate when the timer will neet to set
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* the overflow bit again */
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uint64_t delta = TIMER_OVERFLOW_CNT -
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(pmtmr & (TIMER_OVERFLOW_CNT - 1));
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delta = muldiv64(delta, ticks_per_sec, PM_FREQ);
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qemu_mod_timer(s->tmr_timer, qemu_get_clock(vm_clock) + delta);
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}
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}
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s->pmtmr = pmtmr;
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}
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static uint32_t get_pmtmr(PIIX4PMState *s)
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{
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uint32_t d;
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d = muldiv64(qemu_get_clock(vm_clock), PM_FREQ, ticks_per_sec);
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return d & 0xffffff;
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update_pmtmr(s);
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return s->pmtmr & TIMER_MASK;
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}
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static int get_pmsts(PIIX4PMState *s)
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{
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int64_t d;
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int pmsts;
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pmsts = s->pmsts;
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d = muldiv64(qemu_get_clock(vm_clock), PM_FREQ, ticks_per_sec);
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if (d >= s->tmr_overflow_time)
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s->pmsts |= TMROF_EN;
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return pmsts;
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/* Just increase the accurancy by double computing the timer value */
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update_pmtmr(s);
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return s->pmsts;
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}
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static void pm_update_sci(PIIX4PMState *s)
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{
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int sci_level, pmsts;
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int64_t expire_time;
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int sci_level;
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pmsts = get_pmsts(s);
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sci_level = (((pmsts & s->pmen) &
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sci_level = (((s->pmsts & s->pmen) &
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(RTC_EN | PWRBTN_EN | GBL_EN | TMROF_EN)) != 0);
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if (!sci_level)
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qemu_set_irq(s->irq, sci_level);
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/* schedule a timer interruption if needed */
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if ((s->pmen & TMROF_EN) && !(pmsts & TMROF_EN)) {
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expire_time = muldiv64(s->tmr_overflow_time, ticks_per_sec, PM_FREQ);
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qemu_mod_timer(s->tmr_timer, expire_time);
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s->tmr_overflow_time += 0x800000;
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} else {
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qemu_del_timer(s->tmr_timer);
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}
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}
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static void pm_tmr_timer(void *opaque)
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{
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PIIX4PMState *s = opaque;
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pm_update_sci(s);
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update_pmtmr(s);
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}
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static void pm_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
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@ -123,18 +140,9 @@ static void pm_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
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addr &= 0x3f;
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switch(addr) {
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case 0x00:
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{
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int64_t d;
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int pmsts;
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pmsts = get_pmsts(s);
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if (pmsts & val & TMROF_EN) {
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/* if TMRSTS is reset, then compute the new overflow time */
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d = muldiv64(qemu_get_clock(vm_clock), PM_FREQ, ticks_per_sec);
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s->tmr_overflow_time = (d + 0x800000LL) & ~0x7fffffLL;
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}
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s->pmsts &= ~val;
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update_pmtmr(s);
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pm_update_sci(s);
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}
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break;
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case 0x02:
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s->pmen = val;
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