target-arm queue:
* exynos4210: QOM'ify the Exynos4210 SoC * exynos4210: Add DMA support for the Exynos4210 * arm_gicv3: Fix writes to ICC_CTLR_EL3 * arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1} * target/arm: Fix vector operation segfault * target/arm: Minor improvements to BFXIL, EXTR -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAlzmrL8ZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3rh7D/4yQGoQOxXXe7MPJcjk7K0I 3jlIM7Lw9JJjdc7fJyC0oNpR6sJEjbT/W+tHzb6f5reAojvloM1nMymCoR829n5w nxCjeWkbWo5+UGvDlPx4xLA3NaqKKahjMkPI6oyjDWgzIUZ9nFYMmoGBSGIo/ZhP JEJKnUoWpYXRNw8ThjmiOT3LHOLb5Bb2XrVcr5l/f0twqeiykmMbK1hZn7f9HjjF Kaa9kiiITxWqvQtOr+mMyMoHJ1PSvOf0FpTU6gisbAf2fcjB0vP3NsFq6PEIs61G J/P03qsLZrzc0Rf7b/4DCaFrdQVJ83+J8PnP8YyrubEEKY8z98SaxSkb6K++Tmji 3bqkk/RhLoP6+WTTvWq3MlLTHmeoAKa1/8DCwzO/tCgkfcRmZgGj+LXC/XR5Nbv9 YhXTbjNdJ4cuLJykiEodLZ1Yjx31eN6TRs8G/yX7rUbhww/TEOkRDK4MvwL3f/E0 43QqxQ8jpPmPX1X8P3x7ap9H2qPj/LtVnbs4REURRZpA1xleeY3GDgNR2GGfnHWT ZXnV+Q1LSG/xu74l7SUD+5FRp72SANEi3GcMyqfapMc1qLGX/bN/ScATR+32GwSy 0w0Ht6TIsaoVztLgh/kp3kH9xQm0YsdyaFrn48DP3Hs9iYAA22ycc2AFnaPfV9qK 0s1zmKLB54tszS5TnXkU/g== =AixZ -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190523' into staging target-arm queue: * exynos4210: QOM'ify the Exynos4210 SoC * exynos4210: Add DMA support for the Exynos4210 * arm_gicv3: Fix writes to ICC_CTLR_EL3 * arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1} * target/arm: Fix vector operation segfault * target/arm: Minor improvements to BFXIL, EXTR # gpg: Signature made Thu 23 May 2019 15:22:55 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20190523: hw/arm/exynos4210: QOM'ify the Exynos4210 SoC hw/arm/exynos4210: Add DMA support for the Exynos4210 hw/arm/exynos4: Use the IEC binary prefix definitions hw/arm/exynos4: Remove unuseful debug code hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3 hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1} arm: Rename hw/arm/arm.h to hw/arm/boot.h arm: Remove unnecessary includes of hw/arm/arm.h arm: Move system_clock_scale to armv7m_systick.h target/arm: Fix vector operation segfault target/arm: Simplify BFXIL expansion target/arm: Use extract2 for EXTR Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
ceac83e9ba
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@ -17,7 +17,7 @@
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#include "hw/sysbus.h"
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#include "hw/registerfields.h"
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#include "hw/arm/armsse.h"
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#include "hw/arm/arm.h"
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#include "hw/arm/boot.h"
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/* Format of the System Information block SYS_CONFIG register */
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typedef enum SysConfigFormat {
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|
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@ -13,7 +13,7 @@
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#include "qemu-common.h"
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#include "cpu.h"
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#include "hw/sysbus.h"
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#include "hw/arm/arm.h"
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#include "hw/arm/boot.h"
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#include "hw/loader.h"
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#include "elf.h"
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#include "sysemu/qtest.h"
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|
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@ -14,7 +14,7 @@
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#include "qemu-common.h"
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#include "cpu.h"
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#include "exec/address-spaces.h"
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#include "hw/arm/arm.h"
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#include "hw/arm/boot.h"
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#include "hw/arm/aspeed.h"
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#include "hw/arm/aspeed_soc.h"
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#include "hw/boards.h"
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@ -12,7 +12,7 @@
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#include "qapi/error.h"
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#include <libfdt.h>
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#include "hw/hw.h"
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#include "hw/arm/arm.h"
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#include "hw/arm/boot.h"
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#include "hw/arm/linux-boot-if.h"
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#include "sysemu/kvm.h"
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#include "sysemu/sysemu.h"
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|
|
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@ -14,7 +14,7 @@
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#include "hw/sysbus.h"
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#include "hw/boards.h"
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#include "strongarm.h"
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#include "hw/arm/arm.h"
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#include "hw/arm/boot.h"
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#include "hw/block/flash.h"
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#include "exec/address-spaces.h"
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#include "cpu.h"
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|
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@ -30,7 +30,7 @@
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#include "hw/boards.h"
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#include "sysemu/sysemu.h"
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#include "hw/sysbus.h"
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#include "hw/arm/arm.h"
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#include "hw/arm/boot.h"
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#include "hw/loader.h"
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#include "hw/arm/exynos4210.h"
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#include "hw/sd/sdhci.h"
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@ -96,6 +96,11 @@
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/* EHCI */
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#define EXYNOS4210_EHCI_BASE_ADDR 0x12580000
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/* DMA */
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#define EXYNOS4210_PL330_BASE0_ADDR 0x12680000
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#define EXYNOS4210_PL330_BASE1_ADDR 0x12690000
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#define EXYNOS4210_PL330_BASE2_ADDR 0x12850000
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static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43,
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0x09, 0x00, 0x00, 0x00 };
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@ -160,9 +165,23 @@ static uint64_t exynos4210_calc_affinity(int cpu)
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return (0x9 << ARM_AFF1_SHIFT) | cpu;
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}
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Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
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static void pl330_create(uint32_t base, qemu_irq irq, int nreq)
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{
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Exynos4210State *s = g_new0(Exynos4210State, 1);
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SysBusDevice *busdev;
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DeviceState *dev;
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dev = qdev_create(NULL, "pl330");
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qdev_prop_set_uint8(dev, "num_periph_req", nreq);
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qdev_init_nofail(dev);
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busdev = SYS_BUS_DEVICE(dev);
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sysbus_mmio_map(busdev, 0, base);
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sysbus_connect_irq(busdev, 0, irq);
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}
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static void exynos4210_realize(DeviceState *socdev, Error **errp)
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{
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Exynos4210State *s = EXYNOS4210_SOC(socdev);
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MemoryRegion *system_mem = get_system_memory();
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qemu_irq gate_irq[EXYNOS4210_NCPUS][EXYNOS4210_IRQ_GATE_NINPUTS];
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SysBusDevice *busdev;
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DeviceState *dev;
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|
@ -410,5 +429,32 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
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sysbus_create_simple(TYPE_EXYNOS4210_EHCI, EXYNOS4210_EHCI_BASE_ADDR,
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s->irq_table[exynos4210_get_irq(28, 3)]);
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return s;
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/*** DMA controllers ***/
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pl330_create(EXYNOS4210_PL330_BASE0_ADDR,
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qemu_irq_invert(s->irq_table[exynos4210_get_irq(35, 1)]), 32);
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pl330_create(EXYNOS4210_PL330_BASE1_ADDR,
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qemu_irq_invert(s->irq_table[exynos4210_get_irq(36, 1)]), 32);
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pl330_create(EXYNOS4210_PL330_BASE2_ADDR,
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qemu_irq_invert(s->irq_table[exynos4210_get_irq(34, 1)]), 1);
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}
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static void exynos4210_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = exynos4210_realize;
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}
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static const TypeInfo exynos4210_info = {
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.name = TYPE_EXYNOS4210_SOC,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(Exynos4210State),
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.class_init = exynos4210_class_init,
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};
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static void exynos4210_register_types(void)
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{
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type_register_static(&exynos4210_info);
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}
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type_init(exynos4210_register_types)
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|
|
|
@ -22,6 +22,7 @@
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "qapi/error.h"
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#include "qemu/error-report.h"
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#include "qemu-common.h"
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|
@ -29,26 +30,12 @@
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#include "sysemu/sysemu.h"
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#include "hw/sysbus.h"
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#include "net/net.h"
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#include "hw/arm/arm.h"
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#include "hw/arm/boot.h"
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#include "exec/address-spaces.h"
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#include "hw/arm/exynos4210.h"
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#include "hw/net/lan9118.h"
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#include "hw/boards.h"
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#undef DEBUG
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//#define DEBUG
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#ifdef DEBUG
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#undef PRINT_DEBUG
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#define PRINT_DEBUG(fmt, args...) \
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do { \
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fprintf(stderr, " [%s:%d] "fmt, __func__, __LINE__, ##args); \
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} while (0)
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#else
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#define PRINT_DEBUG(fmt, args...) do {} while (0)
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#endif
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#define SMDK_LAN9118_BASE_ADDR 0x05000000
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typedef enum Exynos4BoardType {
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|
@ -58,7 +45,7 @@ typedef enum Exynos4BoardType {
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} Exynos4BoardType;
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typedef struct Exynos4BoardState {
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Exynos4210State *soc;
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Exynos4210State soc;
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MemoryRegion dram0_mem;
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MemoryRegion dram1_mem;
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} Exynos4BoardState;
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|
@ -74,8 +61,8 @@ static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = {
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};
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static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = {
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[EXYNOS4_BOARD_NURI] = 0x40000000,
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[EXYNOS4_BOARD_SMDKC210] = 0x40000000,
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[EXYNOS4_BOARD_NURI] = 1 * GiB,
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[EXYNOS4_BOARD_SMDKC210] = 1 * GiB,
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};
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static struct arm_boot_info exynos4_board_binfo = {
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|
@ -140,20 +127,13 @@ exynos4_boards_init_common(MachineState *machine,
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exynos4_board_binfo.gic_cpu_if_addr =
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EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100;
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PRINT_DEBUG("\n ram_size: %luMiB [0x%08lx]\n"
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" kernel_filename: %s\n"
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" kernel_cmdline: %s\n"
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" initrd_filename: %s\n",
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exynos4_board_ram_size[board_type] / 1048576,
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exynos4_board_ram_size[board_type],
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machine->kernel_filename,
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machine->kernel_cmdline,
|
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machine->initrd_filename);
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exynos4_boards_init_ram(s, get_system_memory(),
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exynos4_board_ram_size[board_type]);
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s->soc = exynos4210_init(get_system_memory());
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object_initialize(&s->soc, sizeof(s->soc), TYPE_EXYNOS4210_SOC);
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qdev_set_parent_bus(DEVICE(&s->soc), sysbus_get_default());
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object_property_set_bool(OBJECT(&s->soc), true, "realized",
|
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&error_fatal);
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return s;
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}
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|
@ -171,7 +151,7 @@ static void smdkc210_init(MachineState *machine)
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EXYNOS4_BOARD_SMDKC210);
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lan9215_init(SMDK_LAN9118_BASE_ADDR,
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qemu_irq_invert(s->soc->irq_table[exynos4210_get_irq(37, 1)]));
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qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)]));
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arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo);
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}
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|
|
|
@ -20,7 +20,7 @@
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "hw/sysbus.h"
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#include "hw/arm/arm.h"
|
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#include "hw/arm/boot.h"
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#include "hw/loader.h"
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#include "net/net.h"
|
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#include "sysemu/kvm.h"
|
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|
|
|
@ -13,7 +13,7 @@
|
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#include "cpu.h"
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#include "hw/sysbus.h"
|
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#include "hw/boards.h"
|
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#include "hw/arm/arm.h"
|
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#include "hw/arm/boot.h"
|
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#include "hw/misc/arm_integrator_debug.h"
|
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#include "hw/net/smc91c111.h"
|
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#include "net/net.h"
|
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|
|
|
@ -16,7 +16,7 @@
|
|||
#include "qapi/error.h"
|
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#include "hw/hw.h"
|
||||
#include "hw/arm/pxa.h"
|
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#include "hw/arm/arm.h"
|
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#include "hw/arm/boot.h"
|
||||
#include "net/net.h"
|
||||
#include "hw/net/smc91c111.h"
|
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#include "hw/boards.h"
|
||||
|
|
|
@ -11,7 +11,7 @@
|
|||
#include "qemu/osdep.h"
|
||||
#include "qapi/error.h"
|
||||
#include "hw/boards.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "sysemu/sysemu.h"
|
||||
#include "exec/address-spaces.h"
|
||||
|
||||
|
|
|
@ -40,7 +40,7 @@
|
|||
#include "qemu/osdep.h"
|
||||
#include "qapi/error.h"
|
||||
#include "qemu/error-report.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/arm/armv7m.h"
|
||||
#include "hw/or-irq.h"
|
||||
#include "hw/boards.h"
|
||||
|
|
|
@ -25,7 +25,7 @@
|
|||
#include "qemu/osdep.h"
|
||||
#include "qapi/error.h"
|
||||
#include "qemu/error-report.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/arm/armv7m.h"
|
||||
#include "hw/or-irq.h"
|
||||
#include "hw/boards.h"
|
||||
|
|
|
@ -26,7 +26,6 @@
|
|||
#include "qemu/units.h"
|
||||
#include "qapi/error.h"
|
||||
#include "qemu-common.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "exec/address-spaces.h"
|
||||
#include "hw/char/serial.h"
|
||||
#include "hw/boards.h"
|
||||
|
|
|
@ -27,7 +27,7 @@
|
|||
#include "qapi/error.h"
|
||||
#include "qemu/error-report.h"
|
||||
#include "hw/boards.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "exec/address-spaces.h"
|
||||
#include "hw/arm/msf2-soc.h"
|
||||
#include "cpu.h"
|
||||
|
|
|
@ -24,7 +24,7 @@
|
|||
#include "qapi/error.h"
|
||||
#include "exec/address-spaces.h"
|
||||
#include "sysemu/sysemu.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/arm/armsse.h"
|
||||
#include "hw/boards.h"
|
||||
#include "hw/char/pl011.h"
|
||||
|
|
|
@ -14,7 +14,7 @@
|
|||
#include "qemu-common.h"
|
||||
#include "cpu.h"
|
||||
#include "hw/sysbus.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "net/net.h"
|
||||
#include "sysemu/sysemu.h"
|
||||
#include "hw/boards.h"
|
||||
|
|
|
@ -27,7 +27,7 @@
|
|||
#include "hw/boards.h"
|
||||
#include "qemu/error-report.h"
|
||||
#include "hw/arm/stm32f205_soc.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
|
||||
static void netduino2_init(MachineState *machine)
|
||||
{
|
||||
|
|
|
@ -11,7 +11,7 @@
|
|||
#include "qemu/osdep.h"
|
||||
#include "qapi/error.h"
|
||||
#include "qemu-common.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/sysbus.h"
|
||||
#include "hw/boards.h"
|
||||
#include "hw/misc/unimp.h"
|
||||
|
|
|
@ -25,7 +25,7 @@
|
|||
#include "qemu/bswap.h"
|
||||
#include "sysemu/sysemu.h"
|
||||
#include "hw/arm/omap.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/irq.h"
|
||||
#include "ui/console.h"
|
||||
#include "hw/boards.h"
|
||||
|
|
|
@ -24,7 +24,7 @@
|
|||
#include "cpu.h"
|
||||
#include "hw/boards.h"
|
||||
#include "hw/hw.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/arm/omap.h"
|
||||
#include "sysemu/sysemu.h"
|
||||
#include "hw/arm/soc_dma.h"
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
#include "sysemu/qtest.h"
|
||||
#include "hw/boards.h"
|
||||
#include "hw/hw.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/arm/omap.h"
|
||||
#include "sysemu/sysemu.h"
|
||||
#include "qemu/timer.h"
|
||||
|
|
|
@ -31,7 +31,7 @@
|
|||
#include "ui/console.h"
|
||||
#include "hw/arm/omap.h"
|
||||
#include "hw/boards.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/block/flash.h"
|
||||
#include "sysemu/qtest.h"
|
||||
#include "exec/address-spaces.h"
|
||||
|
|
|
@ -25,7 +25,7 @@
|
|||
#include "ui/console.h"
|
||||
#include "hw/arm/omap.h"
|
||||
#include "hw/boards.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/input/tsc2xxx.h"
|
||||
#include "hw/loader.h"
|
||||
#include "exec/address-spaces.h"
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
#include "qemu/error-report.h"
|
||||
#include "hw/boards.h"
|
||||
#include "hw/loader.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "sysemu/sysemu.h"
|
||||
|
||||
#define SMPBOOT_ADDR 0x300 /* this should leave enough space for ATAGS */
|
||||
|
|
|
@ -12,7 +12,7 @@
|
|||
#include "qemu-common.h"
|
||||
#include "cpu.h"
|
||||
#include "hw/sysbus.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/arm/primecell.h"
|
||||
#include "hw/net/lan9118.h"
|
||||
#include "hw/net/smc91c111.h"
|
||||
|
|
|
@ -14,7 +14,7 @@
|
|||
#include "qapi/error.h"
|
||||
#include "hw/hw.h"
|
||||
#include "hw/arm/pxa.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "sysemu/sysemu.h"
|
||||
#include "hw/pcmcia.h"
|
||||
#include "hw/i2c/i2c.h"
|
||||
|
|
|
@ -11,7 +11,7 @@
|
|||
#include "qapi/error.h"
|
||||
#include "hw/sysbus.h"
|
||||
#include "hw/ssi/ssi.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "qemu/timer.h"
|
||||
#include "hw/i2c/i2c.h"
|
||||
#include "net/net.h"
|
||||
|
|
|
@ -25,7 +25,7 @@
|
|||
#include "qemu/osdep.h"
|
||||
#include "qapi/error.h"
|
||||
#include "qemu-common.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "exec/address-spaces.h"
|
||||
#include "hw/arm/stm32f205_soc.h"
|
||||
|
||||
|
|
|
@ -33,7 +33,7 @@
|
|||
#include "hw/sysbus.h"
|
||||
#include "strongarm.h"
|
||||
#include "qemu/error-report.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "chardev/char-fe.h"
|
||||
#include "chardev/char-serial.h"
|
||||
#include "sysemu/sysemu.h"
|
||||
|
|
|
@ -15,7 +15,7 @@
|
|||
#include "qapi/error.h"
|
||||
#include "hw/hw.h"
|
||||
#include "hw/arm/pxa.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/arm/sharpsl.h"
|
||||
#include "hw/pcmcia.h"
|
||||
#include "hw/boards.h"
|
||||
|
|
|
@ -12,7 +12,7 @@
|
|||
#include "qemu-common.h"
|
||||
#include "cpu.h"
|
||||
#include "hw/sysbus.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/net/smc91c111.h"
|
||||
#include "net/net.h"
|
||||
#include "sysemu/sysemu.h"
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
#include "qemu-common.h"
|
||||
#include "cpu.h"
|
||||
#include "hw/sysbus.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/arm/primecell.h"
|
||||
#include "hw/net/lan9118.h"
|
||||
#include "hw/i2c/i2c.h"
|
||||
|
|
|
@ -33,7 +33,7 @@
|
|||
#include "qemu/option.h"
|
||||
#include "qapi/error.h"
|
||||
#include "hw/sysbus.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/arm/primecell.h"
|
||||
#include "hw/arm/virt.h"
|
||||
#include "hw/block/flash.h"
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
#include "qemu-common.h"
|
||||
#include "cpu.h"
|
||||
#include "hw/sysbus.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "net/net.h"
|
||||
#include "exec/address-spaces.h"
|
||||
#include "sysemu/sysemu.h"
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#include "net/net.h"
|
||||
#include "sysemu/sysemu.h"
|
||||
#include "sysemu/kvm.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "kvm_arm.h"
|
||||
#include "hw/misc/unimp.h"
|
||||
#include "hw/intc/arm_gicv3_common.h"
|
||||
|
|
|
@ -14,7 +14,7 @@
|
|||
#include "qemu/osdep.h"
|
||||
#include "hw/hw.h"
|
||||
#include "hw/arm/pxa.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/i2c/i2c.h"
|
||||
#include "hw/ssi/ssi.h"
|
||||
#include "hw/boards.h"
|
||||
|
|
|
@ -1856,7 +1856,7 @@ static void icc_ctlr_el3_write(CPUARMState *env, const ARMCPRegInfo *ri,
|
|||
trace_gicv3_icc_ctlr_el3_write(gicv3_redist_affid(cs), value);
|
||||
|
||||
/* *_EL1NS and *_EL1S bits are aliases into the ICC_CTLR_EL1 bits. */
|
||||
cs->icc_ctlr_el1[GICV3_NS] &= (ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE);
|
||||
cs->icc_ctlr_el1[GICV3_NS] &= ~(ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE);
|
||||
if (value & ICC_CTLR_EL3_EOIMODE_EL1NS) {
|
||||
cs->icc_ctlr_el1[GICV3_NS] |= ICC_CTLR_EL1_EOIMODE;
|
||||
}
|
||||
|
@ -1864,7 +1864,7 @@ static void icc_ctlr_el3_write(CPUARMState *env, const ARMCPRegInfo *ri,
|
|||
cs->icc_ctlr_el1[GICV3_NS] |= ICC_CTLR_EL1_CBPR;
|
||||
}
|
||||
|
||||
cs->icc_ctlr_el1[GICV3_S] &= (ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE);
|
||||
cs->icc_ctlr_el1[GICV3_S] &= ~(ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE);
|
||||
if (value & ICC_CTLR_EL3_EOIMODE_EL1S) {
|
||||
cs->icc_ctlr_el1[GICV3_S] |= ICC_CTLR_EL1_EOIMODE;
|
||||
}
|
||||
|
@ -2366,7 +2366,7 @@ static void ich_vmcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
|
|||
/* Enforce "writing BPRs to less than minimum sets them to the minimum"
|
||||
* by reading and writing back the fields.
|
||||
*/
|
||||
write_vbpr(cs, GICV3_G1, read_vbpr(cs, GICV3_G0));
|
||||
write_vbpr(cs, GICV3_G0, read_vbpr(cs, GICV3_G0));
|
||||
write_vbpr(cs, GICV3_G1, read_vbpr(cs, GICV3_G1));
|
||||
|
||||
gicv3_cpuif_virt_update(cs);
|
||||
|
|
|
@ -16,7 +16,6 @@
|
|||
#include "cpu.h"
|
||||
#include "hw/sysbus.h"
|
||||
#include "qemu/timer.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/intc/armv7m_nvic.h"
|
||||
#include "target/arm/cpu.h"
|
||||
#include "exec/exec-all.h"
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
#include "qemu-common.h"
|
||||
#include "qemu/error-report.h"
|
||||
#include "hw/char/serial.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/timer/allwinner-a10-pit.h"
|
||||
#include "hw/intc/allwinner-a10-pic.h"
|
||||
#include "hw/net/allwinner_emac.h"
|
||||
|
|
|
@ -12,7 +12,6 @@
|
|||
#ifndef ASPEED_SOC_H
|
||||
#define ASPEED_SOC_H
|
||||
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/intc/aspeed_vic.h"
|
||||
#include "hw/misc/aspeed_scu.h"
|
||||
#include "hw/misc/aspeed_sdmc.h"
|
||||
|
|
|
@ -11,7 +11,6 @@
|
|||
#ifndef BCM2836_H
|
||||
#define BCM2836_H
|
||||
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/bcm2835_peripherals.h"
|
||||
#include "hw/intc/bcm2836_control.h"
|
||||
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Misc ARM declarations
|
||||
* ARM kernel loader.
|
||||
*
|
||||
* Copyright (c) 2006 CodeSourcery.
|
||||
* Written by Paul Brook
|
||||
|
@ -8,8 +8,8 @@
|
|||
*
|
||||
*/
|
||||
|
||||
#ifndef HW_ARM_H
|
||||
#define HW_ARM_H
|
||||
#ifndef HW_ARM_BOOT_H
|
||||
#define HW_ARM_BOOT_H
|
||||
|
||||
#include "exec/memory.h"
|
||||
#include "target/arm/cpu-qom.h"
|
||||
|
@ -167,8 +167,4 @@ void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu,
|
|||
const struct arm_boot_info *info,
|
||||
hwaddr mvbar_addr);
|
||||
|
||||
/* Multiplication factor to convert from system clock ticks to qemu timer
|
||||
ticks. */
|
||||
extern int system_clock_scale;
|
||||
|
||||
#endif /* HW_ARM_H */
|
||||
#endif /* HW_ARM_BOOT_H */
|
|
@ -85,6 +85,9 @@ typedef struct Exynos4210Irq {
|
|||
} Exynos4210Irq;
|
||||
|
||||
typedef struct Exynos4210State {
|
||||
/*< private >*/
|
||||
SysBusDevice parent_obj;
|
||||
/*< public >*/
|
||||
ARMCPU *cpu[EXYNOS4210_NCPUS];
|
||||
Exynos4210Irq irqs;
|
||||
qemu_irq *irq_table;
|
||||
|
@ -98,11 +101,13 @@ typedef struct Exynos4210State {
|
|||
I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER];
|
||||
} Exynos4210State;
|
||||
|
||||
#define TYPE_EXYNOS4210_SOC "exynos4210"
|
||||
#define EXYNOS4210_SOC(obj) \
|
||||
OBJECT_CHECK(Exynos4210State, obj, TYPE_EXYNOS4210_SOC)
|
||||
|
||||
void exynos4210_write_secondary(ARMCPU *cpu,
|
||||
const struct arm_boot_info *info);
|
||||
|
||||
Exynos4210State *exynos4210_init(MemoryRegion *system_mem);
|
||||
|
||||
/* Initialize exynos4210 IRQ subsystem stub */
|
||||
qemu_irq *exynos4210_init_irq(Exynos4210Irq *env);
|
||||
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#ifndef FSL_IMX25_H
|
||||
#define FSL_IMX25_H
|
||||
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/intc/imx_avic.h"
|
||||
#include "hw/misc/imx25_ccm.h"
|
||||
#include "hw/char/imx_serial.h"
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#ifndef FSL_IMX31_H
|
||||
#define FSL_IMX31_H
|
||||
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/intc/imx_avic.h"
|
||||
#include "hw/misc/imx31_ccm.h"
|
||||
#include "hw/char/imx_serial.h"
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#ifndef FSL_IMX6_H
|
||||
#define FSL_IMX6_H
|
||||
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/cpu/a9mpcore.h"
|
||||
#include "hw/misc/imx6_ccm.h"
|
||||
#include "hw/misc/imx6_src.h"
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#ifndef FSL_IMX6UL_H
|
||||
#define FSL_IMX6UL_H
|
||||
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/cpu/a15mpcore.h"
|
||||
#include "hw/misc/imx6ul_ccm.h"
|
||||
#include "hw/misc/imx6_src.h"
|
||||
|
|
|
@ -19,7 +19,7 @@
|
|||
#ifndef FSL_IMX7_H
|
||||
#define FSL_IMX7_H
|
||||
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/cpu/a15mpcore.h"
|
||||
#include "hw/intc/imx_gpcv2.h"
|
||||
#include "hw/misc/imx7_ccm.h"
|
||||
|
|
|
@ -34,7 +34,7 @@
|
|||
#include "exec/hwaddr.h"
|
||||
#include "qemu/notify.h"
|
||||
#include "hw/boards.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/block/flash.h"
|
||||
#include "sysemu/kvm.h"
|
||||
#include "hw/intc/arm_gicv3_common.h"
|
||||
|
|
|
@ -13,7 +13,7 @@
|
|||
#define XLNX_VERSAL_H
|
||||
|
||||
#include "hw/sysbus.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/intc/arm_gicv3.h"
|
||||
|
||||
#define TYPE_XLNX_VERSAL "xlnx-versal"
|
||||
|
|
|
@ -18,7 +18,7 @@
|
|||
#ifndef XLNX_ZYNQMP_H
|
||||
|
||||
#include "qemu-common.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "hw/intc/arm_gic.h"
|
||||
#include "hw/net/cadence_gem.h"
|
||||
#include "hw/char/cadence_uart.h"
|
||||
|
|
|
@ -31,4 +31,26 @@ typedef struct SysTickState {
|
|||
qemu_irq irq;
|
||||
} SysTickState;
|
||||
|
||||
/*
|
||||
* Multiplication factor to convert from system clock ticks to qemu timer
|
||||
* ticks. This should be set (by board code, usually) to a value
|
||||
* equal to NANOSECONDS_PER_SECOND / frq, where frq is the clock frequency
|
||||
* in Hz of the CPU.
|
||||
*
|
||||
* This value is used by the systick device when it is running in
|
||||
* its "use the CPU clock" mode (ie when SYST_CSR.CLKSOURCE == 1) to
|
||||
* set how fast the timer should tick.
|
||||
*
|
||||
* TODO: we should refactor this so that rather than using a global
|
||||
* we use a device property or something similar. This is complicated
|
||||
* because (a) the property would need to be plumbed through from the
|
||||
* board code down through various layers to the systick device
|
||||
* and (b) the property needs to be modifiable after realize, because
|
||||
* the stellaris board uses this to implement the behaviour where the
|
||||
* guest can reprogram the PLL registers to downclock the CPU, and the
|
||||
* systick device needs to react accordingly. Possibly this should
|
||||
* be deferred until we have a good API for modelling clock trees.
|
||||
*/
|
||||
extern int system_clock_scale;
|
||||
|
||||
#endif
|
||||
|
|
|
@ -29,7 +29,6 @@
|
|||
#else
|
||||
#include "qemu-common.h"
|
||||
#include "exec/gdbstub.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "qemu/cutils.h"
|
||||
#endif
|
||||
|
||||
|
|
|
@ -30,7 +30,6 @@
|
|||
#if !defined(CONFIG_USER_ONLY)
|
||||
#include "hw/loader.h"
|
||||
#endif
|
||||
#include "hw/arm/arm.h"
|
||||
#include "sysemu/sysemu.h"
|
||||
#include "sysemu/hw_accel.h"
|
||||
#include "kvm_arm.h"
|
||||
|
|
|
@ -25,7 +25,6 @@
|
|||
#if !defined(CONFIG_USER_ONLY)
|
||||
#include "hw/loader.h"
|
||||
#endif
|
||||
#include "hw/arm/arm.h"
|
||||
#include "sysemu/sysemu.h"
|
||||
#include "sysemu/kvm.h"
|
||||
#include "kvm_arm.h"
|
||||
|
|
|
@ -23,7 +23,6 @@
|
|||
#include "cpu.h"
|
||||
#include "trace.h"
|
||||
#include "internals.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "hw/pci/pci.h"
|
||||
#include "exec/memattrs.h"
|
||||
#include "exec/address-spaces.h"
|
||||
|
|
|
@ -20,7 +20,6 @@
|
|||
#include "sysemu/kvm.h"
|
||||
#include "kvm_arm.h"
|
||||
#include "internals.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "qemu/log.h"
|
||||
|
||||
static inline void set_feature(uint64_t *features, int feature)
|
||||
|
|
|
@ -26,7 +26,6 @@
|
|||
#include "sysemu/kvm.h"
|
||||
#include "kvm_arm.h"
|
||||
#include "internals.h"
|
||||
#include "hw/arm/arm.h"
|
||||
|
||||
static bool have_guest_debug;
|
||||
|
||||
|
|
|
@ -4043,8 +4043,8 @@ static void disas_bitfield(DisasContext *s, uint32_t insn)
|
|||
tcg_gen_extract_i64(tcg_rd, tcg_tmp, ri, len);
|
||||
return;
|
||||
}
|
||||
/* opc == 1, BXFIL fall through to deposit */
|
||||
tcg_gen_extract_i64(tcg_tmp, tcg_tmp, ri, len);
|
||||
/* opc == 1, BFXIL fall through to deposit */
|
||||
tcg_gen_shri_i64(tcg_tmp, tcg_tmp, ri);
|
||||
pos = 0;
|
||||
} else {
|
||||
/* Handle the ri > si case with a deposit
|
||||
|
@ -4062,7 +4062,7 @@ static void disas_bitfield(DisasContext *s, uint32_t insn)
|
|||
len = ri;
|
||||
}
|
||||
|
||||
if (opc == 1) { /* BFM, BXFIL */
|
||||
if (opc == 1) { /* BFM, BFXIL */
|
||||
tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, pos, len);
|
||||
} else {
|
||||
/* SBFM or UBFM: We start with zero, and we haven't modified
|
||||
|
@ -4114,25 +4114,27 @@ static void disas_extract(DisasContext *s, uint32_t insn)
|
|||
} else {
|
||||
tcg_gen_ext32u_i64(tcg_rd, cpu_reg(s, rm));
|
||||
}
|
||||
} else if (rm == rn) { /* ROR */
|
||||
} else {
|
||||
tcg_rm = cpu_reg(s, rm);
|
||||
tcg_rn = cpu_reg(s, rn);
|
||||
|
||||
if (sf) {
|
||||
tcg_gen_rotri_i64(tcg_rd, tcg_rm, imm);
|
||||
/* Specialization to ROR happens in EXTRACT2. */
|
||||
tcg_gen_extract2_i64(tcg_rd, tcg_rm, tcg_rn, imm);
|
||||
} else {
|
||||
TCGv_i32 tmp = tcg_temp_new_i32();
|
||||
tcg_gen_extrl_i64_i32(tmp, tcg_rm);
|
||||
tcg_gen_rotri_i32(tmp, tmp, imm);
|
||||
tcg_gen_extu_i32_i64(tcg_rd, tmp);
|
||||
tcg_temp_free_i32(tmp);
|
||||
TCGv_i32 t0 = tcg_temp_new_i32();
|
||||
|
||||
tcg_gen_extrl_i64_i32(t0, tcg_rm);
|
||||
if (rm == rn) {
|
||||
tcg_gen_rotri_i32(t0, t0, imm);
|
||||
} else {
|
||||
TCGv_i32 t1 = tcg_temp_new_i32();
|
||||
tcg_gen_extrl_i64_i32(t1, tcg_rn);
|
||||
tcg_gen_extract2_i32(t0, t0, t1, imm);
|
||||
tcg_temp_free_i32(t1);
|
||||
}
|
||||
} else {
|
||||
tcg_rm = read_cpu_reg(s, rm, sf);
|
||||
tcg_rn = read_cpu_reg(s, rn, sf);
|
||||
tcg_gen_shri_i64(tcg_rm, tcg_rm, imm);
|
||||
tcg_gen_shli_i64(tcg_rn, tcg_rn, bitsize - imm);
|
||||
tcg_gen_or_i64(tcg_rd, tcg_rm, tcg_rn);
|
||||
if (!sf) {
|
||||
tcg_gen_ext32u_i64(tcg_rd, tcg_rd);
|
||||
tcg_gen_extu_i32_i64(tcg_rd, t0);
|
||||
tcg_temp_free_i32(t0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -6598,13 +6598,13 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
|
|||
tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc),
|
||||
rn_ofs, rm_ofs, vec_size, vec_size,
|
||||
(u ? uqadd_op : sqadd_op) + size);
|
||||
break;
|
||||
return 0;
|
||||
|
||||
case NEON_3R_VQSUB:
|
||||
tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc),
|
||||
rn_ofs, rm_ofs, vec_size, vec_size,
|
||||
(u ? uqsub_op : sqsub_op) + size);
|
||||
break;
|
||||
return 0;
|
||||
|
||||
case NEON_3R_VMUL: /* VMUL */
|
||||
if (u) {
|
||||
|
|
Loading…
Reference in a new issue