vmstate: port pxa2xx_mm
Signed-off-by: Juan Quintela <quintela@redhat.com>
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parent
ae1f90de06
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d102d49545
33
hw/pxa2xx.c
33
hw/pxa2xx.c
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@ -516,25 +516,16 @@ static CPUWriteMemoryFunc * const pxa2xx_mm_writefn[] = {
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pxa2xx_mm_write,
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};
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static void pxa2xx_mm_save(QEMUFile *f, void *opaque)
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{
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PXA2xxState *s = (PXA2xxState *) opaque;
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int i;
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for (i = 0; i < 0x1a; i ++)
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qemu_put_be32s(f, &s->mm_regs[i]);
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}
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static int pxa2xx_mm_load(QEMUFile *f, void *opaque, int version_id)
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{
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PXA2xxState *s = (PXA2xxState *) opaque;
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int i;
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for (i = 0; i < 0x1a; i ++)
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qemu_get_be32s(f, &s->mm_regs[i]);
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return 0;
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}
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static const VMStateDescription vmstate_pxa2xx_mm = {
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.name = "pxa2xx_mm",
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.version_id = 0,
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.minimum_version_id = 0,
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.minimum_version_id_old = 0,
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.fields = (VMStateField[]) {
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VMSTATE_UINT32_ARRAY(mm_regs, PXA2xxState, 0x1a),
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VMSTATE_END_OF_LIST()
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}
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};
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/* Synchronous Serial Ports */
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typedef struct {
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@ -2171,7 +2162,7 @@ PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
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iomemtype = cpu_register_io_memory(pxa2xx_mm_readfn,
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pxa2xx_mm_writefn, s, DEVICE_NATIVE_ENDIAN);
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cpu_register_physical_memory(s->mm_base, 0x1000, iomemtype);
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register_savevm(NULL, "pxa2xx_mm", 0, 0, pxa2xx_mm_save, pxa2xx_mm_load, s);
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vmstate_register(NULL, 0, &vmstate_pxa2xx_mm, s);
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s->pm_base = 0x40f00000;
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iomemtype = cpu_register_io_memory(pxa2xx_pm_readfn,
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@ -2307,7 +2298,7 @@ PXA2xxState *pxa255_init(unsigned int sdram_size)
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iomemtype = cpu_register_io_memory(pxa2xx_mm_readfn,
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pxa2xx_mm_writefn, s, DEVICE_NATIVE_ENDIAN);
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cpu_register_physical_memory(s->mm_base, 0x1000, iomemtype);
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register_savevm(NULL, "pxa2xx_mm", 0, 0, pxa2xx_mm_save, pxa2xx_mm_load, s);
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vmstate_register(NULL, 0, &vmstate_pxa2xx_mm, s);
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s->pm_base = 0x40f00000;
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iomemtype = cpu_register_io_memory(pxa2xx_pm_readfn,
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