acpi: cpuhp: implement hot-add parts of CPU hotplug interface
it adds hw registers needed for handling CPU hot-add and corresponding AML methods to handle hot-add events on guest side. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
parent
ac35f13ba8
commit
d2238cb678
150
hw/acpi/cpu.c
150
hw/acpi/cpu.c
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@ -7,6 +7,13 @@
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#define ACPI_CPU_HOTPLUG_REG_LEN 12
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#define ACPI_CPU_SELECTOR_OFFSET_WR 0
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#define ACPI_CPU_FLAGS_OFFSET_RW 4
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#define ACPI_CPU_CMD_OFFSET_WR 5
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#define ACPI_CPU_CMD_DATA_OFFSET_RW 8
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enum {
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CPHP_GET_NEXT_CPU_WITH_EVENT_CMD = 0,
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CPHP_CMD_MAX
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};
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static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size)
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{
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@ -22,8 +29,19 @@ static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size)
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switch (addr) {
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case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */
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val |= cdev->cpu ? 1 : 0;
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val |= cdev->is_inserting ? 2 : 0;
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trace_cpuhp_acpi_read_flags(cpu_st->selector, val);
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break;
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case ACPI_CPU_CMD_DATA_OFFSET_RW:
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switch (cpu_st->command) {
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case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD:
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val = cpu_st->selector;
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break;
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default:
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break;
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}
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trace_cpuhp_acpi_read_cmd_data(cpu_st->selector, val);
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break;
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default:
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break;
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}
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@ -34,6 +52,7 @@ static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data,
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unsigned int size)
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{
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CPUHotplugState *cpu_st = opaque;
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AcpiCpuStatus *cdev;
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assert(cpu_st->dev_count);
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@ -49,6 +68,33 @@ static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data,
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cpu_st->selector = data;
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trace_cpuhp_acpi_write_idx(cpu_st->selector);
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break;
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case ACPI_CPU_FLAGS_OFFSET_RW: /* set is_* fields */
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cdev = &cpu_st->devs[cpu_st->selector];
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if (data & 2) { /* clear insert event */
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cdev->is_inserting = false;
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trace_cpuhp_acpi_clear_inserting_evt(cpu_st->selector);
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}
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break;
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case ACPI_CPU_CMD_OFFSET_WR:
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trace_cpuhp_acpi_write_cmd(cpu_st->selector, data);
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if (data < CPHP_CMD_MAX) {
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cpu_st->command = data;
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if (cpu_st->command == CPHP_GET_NEXT_CPU_WITH_EVENT_CMD) {
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uint32_t iter = cpu_st->selector;
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do {
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cdev = &cpu_st->devs[iter];
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if (cdev->is_inserting) {
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cpu_st->selector = iter;
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trace_cpuhp_acpi_cpu_has_events(cpu_st->selector,
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cdev->is_inserting);
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break;
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}
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iter = iter + 1 < cpu_st->dev_count ? iter + 1 : 0;
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} while (iter != cpu_st->selector);
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}
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}
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break;
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default:
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break;
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}
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@ -111,7 +157,22 @@ void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
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}
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cdev->cpu = CPU(dev);
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if (dev->hotplugged) {
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cdev->is_inserting = true;
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acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
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}
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}
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static const VMStateDescription vmstate_cpuhp_sts = {
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.name = "CPU hotplug device state",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField[]) {
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VMSTATE_BOOL(is_inserting, AcpiCpuStatus),
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VMSTATE_END_OF_LIST()
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}
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};
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const VMStateDescription vmstate_cpu_hotplug = {
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.name = "CPU hotplug state",
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@ -120,6 +181,9 @@ const VMStateDescription vmstate_cpu_hotplug = {
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.minimum_version_id_old = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT32(selector, CPUHotplugState),
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VMSTATE_UINT8(command, CPUHotplugState),
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VMSTATE_STRUCT_VARRAY_POINTER_UINT32(devs, CPUHotplugState, dev_count,
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vmstate_cpuhp_sts, AcpiCpuStatus),
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VMSTATE_END_OF_LIST()
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}
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};
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@ -128,13 +192,19 @@ const VMStateDescription vmstate_cpu_hotplug = {
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#define CPUHP_RES_DEVICE "PRES"
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#define CPU_LOCK "CPLK"
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#define CPU_STS_METHOD "CSTA"
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#define CPU_SCAN_METHOD "CSCN"
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#define CPU_NOTIFY_METHOD "CTFY"
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#define CPU_ENABLED "CPEN"
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#define CPU_SELECTOR "CSEL"
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#define CPU_COMMAND "CCMD"
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#define CPU_DATA "CDAT"
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#define CPU_INSERT_EVENT "CINS"
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void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
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hwaddr io_base,
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const char *res_root)
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const char *res_root,
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const char *event_handler_method)
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{
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Aml *ifctx;
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Aml *field;
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@ -147,6 +217,9 @@ void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine);
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char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root);
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Object *obj = object_resolve_path_type("", TYPE_ACPI_DEVICE_IF, NULL);
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AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj);
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AcpiDeviceIf *adev = ACPI_DEVICE_IF(obj);
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cpu_ctrl_dev = aml_device("%s", cphp_res_path);
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{
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@ -173,11 +246,18 @@ void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
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aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8));
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/* 1 if enabled, read only */
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aml_append(field, aml_named_field(CPU_ENABLED, 1));
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/* (read) 1 if has a insert event. (write) 1 to clear event */
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aml_append(field, aml_named_field(CPU_INSERT_EVENT, 1));
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aml_append(field, aml_reserved_field(6));
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aml_append(field, aml_named_field(CPU_COMMAND, 8));
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aml_append(cpu_ctrl_dev, field);
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field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE);
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/* CPU selector, write only */
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aml_append(field, aml_named_field(CPU_SELECTOR, 32));
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/* flags + cmd + 2byte align */
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aml_append(field, aml_reserved_field(4 * 8));
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aml_append(field, aml_named_field(CPU_DATA, 32));
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aml_append(cpu_ctrl_dev, field);
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}
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@ -189,10 +269,27 @@ void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
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Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK);
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Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR);
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Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED);
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Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND);
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Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA);
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Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT);
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aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010")));
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aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05")));
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method = aml_method(CPU_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
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for (i = 0; i < arch_ids->len; i++) {
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Aml *cpu = aml_name(CPU_NAME_FMT, i);
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Aml *uid = aml_arg(0);
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Aml *event = aml_arg(1);
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ifctx = aml_if(aml_equal(uid, aml_int(i)));
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{
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aml_append(ifctx, aml_notify(cpu, event));
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}
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aml_append(method, ifctx);
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}
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aml_append(cpus_dev, method);
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method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED);
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{
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Aml *idx = aml_arg(0);
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}
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aml_append(cpus_dev, method);
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method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED);
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{
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Aml *while_ctx;
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Aml *has_event = aml_local(0);
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Aml *dev_chk = aml_int(1);
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Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD);
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aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
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aml_append(method, aml_store(one, has_event));
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while_ctx = aml_while(aml_equal(has_event, one));
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{
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/* clear loop exit condition, ins_evt check
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* will set it to 1 while next_cpu_cmd returns a CPU
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* with events */
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aml_append(while_ctx, aml_store(zero, has_event));
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aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd));
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ifctx = aml_if(aml_equal(ins_evt, one));
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{
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aml_append(ifctx,
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aml_call2(CPU_NOTIFY_METHOD, cpu_data, dev_chk));
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aml_append(ifctx, aml_store(one, ins_evt));
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aml_append(ifctx, aml_store(one, has_event));
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}
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aml_append(while_ctx, ifctx);
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}
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aml_append(method, while_ctx);
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aml_append(method, aml_release(ctrl_lock));
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}
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aml_append(cpus_dev, method);
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/* build Processor object for each processor */
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for (i = 0; i < arch_ids->len; i++) {
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Aml *dev;
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Aml *uid = aml_int(i);
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GArray *madt_buf = g_array_new(0, 1, 1);
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int arch_id = arch_ids->cpus[i].arch_id;
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if (opts.apci_1_compatible && arch_id < 255) {
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@ -229,12 +357,32 @@ void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
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aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid)));
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aml_append(dev, method);
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/* build _MAT object */
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assert(adevc && adevc->madt_cpu);
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adevc->madt_cpu(adev, i, arch_ids, madt_buf);
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switch (madt_buf->data[0]) {
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case ACPI_APIC_PROCESSOR: {
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AcpiMadtProcessorApic *apic = (void *)madt_buf->data;
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apic->flags = cpu_to_le32(1);
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break;
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}
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default:
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assert(0);
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}
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aml_append(dev, aml_name_decl("_MAT",
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aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data)));
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g_array_free(madt_buf, true);
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aml_append(cpus_dev, dev);
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}
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}
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aml_append(sb_scope, cpus_dev);
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aml_append(table, sb_scope);
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method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED);
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aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD));
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aml_append(table, method);
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g_free(cphp_res_path);
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g_free(arch_ids);
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}
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@ -21,3 +21,7 @@ mhp_acpi_pc_dimm_delete_failed(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm delete
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cpuhp_acpi_invalid_idx_selected(uint32_t idx) "0x%"PRIx32
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cpuhp_acpi_read_flags(uint32_t idx, uint8_t flags) "idx[0x%"PRIx32"] flags: 0x%"PRIx8
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cpuhp_acpi_write_idx(uint32_t idx) "set active cpu idx: 0x%"PRIx32
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cpuhp_acpi_write_cmd(uint32_t idx, uint8_t cmd) "idx[0x%"PRIx32"] cmd: 0x%"PRIx8
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cpuhp_acpi_read_cmd_data(uint32_t idx, uint32_t data) "idx[0x%"PRIx32"] data: 0x%"PRIx32
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cpuhp_acpi_cpu_has_events(uint32_t idx, bool ins) "idx[0x%"PRIx32"] inserting: %d"
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cpuhp_acpi_clear_inserting_evt(uint32_t idx) "idx[0x%"PRIx32"]"
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@ -20,11 +20,13 @@
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typedef struct AcpiCpuStatus {
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struct CPUState *cpu;
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uint64_t arch_id;
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bool is_inserting;
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} AcpiCpuStatus;
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typedef struct CPUHotplugState {
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MemoryRegion ctrl_reg;
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uint32_t selector;
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uint8_t command;
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uint32_t dev_count;
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AcpiCpuStatus *devs;
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} CPUHotplugState;
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void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
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hwaddr io_base,
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const char *res_root);
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const char *res_root,
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const char *event_handler_method);
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extern const VMStateDescription vmstate_cpu_hotplug;
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#define VMSTATE_CPU_HOTPLUG(cpuhp, state) \
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