target/riscv: Add the HSTATUS register masks
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviwed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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@ -382,6 +382,24 @@
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#define SSTATUS_SD SSTATUS64_SD
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#endif
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/* hstatus CSR bits */
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#define HSTATUS_SPRV 0x00000001
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#define HSTATUS_STL 0x00000040
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#define HSTATUS_SPV 0x00000080
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#define HSTATUS_SP2P 0x00000100
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#define HSTATUS_SP2V 0x00000200
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#define HSTATUS_VTVM 0x00100000
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#define HSTATUS_VTSR 0x00400000
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#define HSTATUS32_WPRI 0xFF8FF87E
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#define HSTATUS64_WPRI 0xFFFFFFFFFF8FF87EULL
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#if defined(TARGET_RISCV32)
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#define HSTATUS_WPRI HSTATUS32_WPRI
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#elif defined(TARGET_RISCV64)
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#define HSTATUS_WPRI HSTATUS64_WPRI
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#endif
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/* Privilege modes */
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#define PRV_U 0
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#define PRV_S 1
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