Trivial m68k cleanup
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlWRZoAACgkQNKT2yavzbFPXawCeMC6tErAzJjeyWYJ62+n3/DOg MXEAmgKOGSnDH8e7Rzxfo82H4PRz+cZR =kLox -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/vivier/tags/pull-m68k-20150629' into staging Trivial m68k cleanup # gpg: Signature made Mon Jun 29 16:38:40 2015 BST using DSA key ID ABF36C53 # gpg: Good signature from "Laurent Vivier <laurent@vivier.eu>" # gpg: aka "Laurent Vivier <Laurent@vivier.eu>" # gpg: aka "Laurent Vivier <Laurent@lvivier.info>" # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" # gpg: aka "[jpeg image of size 3881]" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 9EC7 B78A C0AC E697 5E4B BDE3 34A4 F6C9 ABF3 6C53 * remotes/vivier/tags/pull-m68k-20150629: m68k: remove useless parameter op_size from gen_lea_indexed() m68k: remove useless file m68k-qreg.h m68k: is_mem is useless Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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commit
d2966f804d
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@ -1,11 +0,0 @@
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enum {
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#define DEFO32(name, offset) QREG_##name,
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#define DEFR(name, reg, mode) QREG_##name,
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#define DEFF64(name, offset) QREG_##name,
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QREG_NULL,
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#include "qregs.def"
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TARGET_NUM_QREGS = 0x100
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#undef DEFO32
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#undef DEFR
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#undef DEFF64
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};
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@ -129,7 +129,6 @@ typedef struct DisasContext {
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uint32_t fpcr;
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struct TranslationBlock *tb;
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int singlestep_enabled;
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int is_mem;
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TCGv_i64 mactmp;
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int done_mac;
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} DisasContext;
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@ -179,7 +178,6 @@ static inline TCGv gen_load(DisasContext * s, int opsize, TCGv addr, int sign)
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{
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TCGv tmp;
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int index = IS_USER(s);
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s->is_mem = 1;
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tmp = tcg_temp_new_i32();
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switch(opsize) {
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case OS_BYTE:
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@ -209,7 +207,6 @@ static inline TCGv_i64 gen_load64(DisasContext * s, TCGv addr)
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{
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TCGv_i64 tmp;
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int index = IS_USER(s);
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s->is_mem = 1;
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tmp = tcg_temp_new_i64();
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tcg_gen_qemu_ldf64(tmp, addr, index);
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gen_throws_exception = gen_last_qop;
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@ -220,7 +217,6 @@ static inline TCGv_i64 gen_load64(DisasContext * s, TCGv addr)
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static inline void gen_store(DisasContext *s, int opsize, TCGv addr, TCGv val)
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{
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int index = IS_USER(s);
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s->is_mem = 1;
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switch(opsize) {
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case OS_BYTE:
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tcg_gen_qemu_st8(val, addr, index);
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@ -241,7 +237,6 @@ static inline void gen_store(DisasContext *s, int opsize, TCGv addr, TCGv val)
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static inline void gen_store64(DisasContext *s, TCGv addr, TCGv_i64 val)
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{
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int index = IS_USER(s);
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s->is_mem = 1;
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tcg_gen_qemu_stf64(val, addr, index);
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gen_throws_exception = gen_last_qop;
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}
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@ -297,8 +292,7 @@ static TCGv gen_addr_index(uint16_t ext, TCGv tmp)
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/* Handle a base + index + displacement effective addresss.
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A NULL_QREG base means pc-relative. */
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static TCGv gen_lea_indexed(CPUM68KState *env, DisasContext *s, int opsize,
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TCGv base)
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static TCGv gen_lea_indexed(CPUM68KState *env, DisasContext *s, TCGv base)
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{
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uint32_t offset;
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uint16_t ext;
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@ -529,7 +523,7 @@ static TCGv gen_lea(CPUM68KState *env, DisasContext *s, uint16_t insn,
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return tmp;
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case 6: /* Indirect index + displacement. */
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reg = AREG(insn, 0);
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return gen_lea_indexed(env, s, opsize, reg);
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return gen_lea_indexed(env, s, reg);
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case 7: /* Other */
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switch (insn & 7) {
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case 0: /* Absolute short. */
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@ -545,7 +539,7 @@ static TCGv gen_lea(CPUM68KState *env, DisasContext *s, uint16_t insn,
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s->pc += 2;
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return tcg_const_i32(offset);
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case 3: /* pc index+displacement. */
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return gen_lea_indexed(env, s, opsize, NULL_QREG);
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return gen_lea_indexed(env, s, NULL_QREG);
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case 4: /* Immediate. */
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default:
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return NULL_QREG;
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@ -2227,7 +2221,6 @@ DISAS_INSN(fpu)
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mask = 0x80;
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for (i = 0; i < 8; i++) {
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if (ext & mask) {
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s->is_mem = 1;
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dest = FREG(i, 0);
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if (ext & (1 << 13)) {
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/* store */
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@ -2999,7 +2992,6 @@ gen_intermediate_code_internal(M68kCPU *cpu, TranslationBlock *tb,
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dc->singlestep_enabled = cs->singlestep_enabled;
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dc->fpcr = env->fpcr;
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dc->user = (env->sr & SR_S) == 0;
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dc->is_mem = 0;
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dc->done_mac = 0;
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lj = -1;
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num_insns = 0;
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