openrisc-timer: Reduce overhead, Separate clock update functions
The clock value is only evaluated when really necessary reducing the overhead of the timer handling. This also solves a problem in the way the Linux kernel handles the timer and the expected accuracy. The old version could lead to inaccurate timings. Signed-off-by: Sebastian Macke <sebastian@macke.de> Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Jia Liu <proljc@gmail.com>
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@ -30,19 +30,28 @@ static int is_counting;
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void cpu_openrisc_count_update(OpenRISCCPU *cpu)
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void cpu_openrisc_count_update(OpenRISCCPU *cpu)
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{
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{
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uint64_t now, next;
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uint64_t now;
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uint32_t wait;
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now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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if (!is_counting) {
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if (!is_counting) {
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timer_del(cpu->env.timer);
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last_clk = now;
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return;
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return;
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}
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}
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now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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cpu->env.ttcr += (uint32_t)muldiv64(now - last_clk, TIMER_FREQ,
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cpu->env.ttcr += (uint32_t)muldiv64(now - last_clk, TIMER_FREQ,
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get_ticks_per_sec());
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get_ticks_per_sec());
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last_clk = now;
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last_clk = now;
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}
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void cpu_openrisc_timer_update(OpenRISCCPU *cpu)
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{
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uint32_t wait;
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uint64_t now, next;
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if (!is_counting) {
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return;
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}
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cpu_openrisc_count_update(cpu);
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now = last_clk;
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if ((cpu->env.ttmr & TTMR_TP) <= (cpu->env.ttcr & TTMR_TP)) {
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if ((cpu->env.ttmr & TTMR_TP) <= (cpu->env.ttcr & TTMR_TP)) {
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wait = TTMR_TP - (cpu->env.ttcr & TTMR_TP) + 1;
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wait = TTMR_TP - (cpu->env.ttcr & TTMR_TP) + 1;
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@ -50,7 +59,6 @@ void cpu_openrisc_count_update(OpenRISCCPU *cpu)
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} else {
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} else {
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wait = (cpu->env.ttmr & TTMR_TP) - (cpu->env.ttcr & TTMR_TP);
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wait = (cpu->env.ttmr & TTMR_TP) - (cpu->env.ttcr & TTMR_TP);
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}
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}
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next = now + muldiv64(wait, get_ticks_per_sec(), TIMER_FREQ);
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next = now + muldiv64(wait, get_ticks_per_sec(), TIMER_FREQ);
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timer_mod(cpu->env.timer, next);
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timer_mod(cpu->env.timer, next);
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}
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}
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@ -63,8 +71,9 @@ void cpu_openrisc_count_start(OpenRISCCPU *cpu)
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void cpu_openrisc_count_stop(OpenRISCCPU *cpu)
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void cpu_openrisc_count_stop(OpenRISCCPU *cpu)
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{
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{
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is_counting = 0;
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timer_del(cpu->env.timer);
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cpu_openrisc_count_update(cpu);
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cpu_openrisc_count_update(cpu);
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is_counting = 0;
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}
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}
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static void openrisc_timer_cb(void *opaque)
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static void openrisc_timer_cb(void *opaque)
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@ -84,15 +93,15 @@ static void openrisc_timer_cb(void *opaque)
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break;
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break;
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case TIMER_INTR:
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case TIMER_INTR:
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cpu->env.ttcr = 0;
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cpu->env.ttcr = 0;
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cpu_openrisc_count_start(cpu);
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break;
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break;
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case TIMER_SHOT:
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case TIMER_SHOT:
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cpu_openrisc_count_stop(cpu);
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cpu_openrisc_count_stop(cpu);
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break;
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break;
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case TIMER_CONT:
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case TIMER_CONT:
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cpu_openrisc_count_start(cpu);
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break;
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break;
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}
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}
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cpu_openrisc_timer_update(cpu);
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}
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}
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void cpu_openrisc_clock_init(OpenRISCCPU *cpu)
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void cpu_openrisc_clock_init(OpenRISCCPU *cpu)
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@ -373,6 +373,7 @@ void cpu_openrisc_pic_init(OpenRISCCPU *cpu);
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/* hw/openrisc_timer.c */
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/* hw/openrisc_timer.c */
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void cpu_openrisc_clock_init(OpenRISCCPU *cpu);
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void cpu_openrisc_clock_init(OpenRISCCPU *cpu);
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void cpu_openrisc_count_update(OpenRISCCPU *cpu);
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void cpu_openrisc_count_update(OpenRISCCPU *cpu);
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void cpu_openrisc_timer_update(OpenRISCCPU *cpu);
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void cpu_openrisc_count_start(OpenRISCCPU *cpu);
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void cpu_openrisc_count_start(OpenRISCCPU *cpu);
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void cpu_openrisc_count_stop(OpenRISCCPU *cpu);
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void cpu_openrisc_count_stop(OpenRISCCPU *cpu);
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@ -127,33 +127,31 @@ void HELPER(mtspr)(CPUOpenRISCState *env,
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break;
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break;
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case TO_SPR(10, 0): /* TTMR */
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case TO_SPR(10, 0): /* TTMR */
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{
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{
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if ((env->ttmr & TTMR_M) ^ (rb & TTMR_M)) {
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switch (rb & TTMR_M) {
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case TIMER_NONE:
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cpu_openrisc_count_stop(cpu);
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break;
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case TIMER_INTR:
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case TIMER_SHOT:
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case TIMER_CONT:
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cpu_openrisc_count_start(cpu);
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break;
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default:
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break;
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}
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}
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int ip = env->ttmr & TTMR_IP;
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int ip = env->ttmr & TTMR_IP;
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if (rb & TTMR_IP) { /* Keep IP bit. */
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if (rb & TTMR_IP) { /* Keep IP bit. */
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env->ttmr = (rb & ~TTMR_IP) + ip;
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env->ttmr = (rb & ~TTMR_IP) | ip;
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} else { /* Clear IP bit. */
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} else { /* Clear IP bit. */
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env->ttmr = rb & ~TTMR_IP;
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env->ttmr = rb & ~TTMR_IP;
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cs->interrupt_request &= ~CPU_INTERRUPT_TIMER;
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cs->interrupt_request &= ~CPU_INTERRUPT_TIMER;
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}
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}
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cpu_openrisc_count_update(cpu);
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cpu_openrisc_timer_update(cpu);
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switch (env->ttmr & TTMR_M) {
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case TIMER_NONE:
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cpu_openrisc_count_stop(cpu);
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break;
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case TIMER_INTR:
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cpu_openrisc_count_start(cpu);
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break;
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case TIMER_SHOT:
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cpu_openrisc_count_start(cpu);
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break;
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case TIMER_CONT:
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cpu_openrisc_count_start(cpu);
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break;
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default:
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break;
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}
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}
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}
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break;
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break;
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@ -162,7 +160,7 @@ void HELPER(mtspr)(CPUOpenRISCState *env,
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if (env->ttmr & TIMER_NONE) {
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if (env->ttmr & TIMER_NONE) {
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return;
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return;
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}
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}
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cpu_openrisc_count_start(cpu);
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cpu_openrisc_timer_update(cpu);
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break;
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break;
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default:
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default:
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