qemu-sparc queue

-----BEGIN PGP SIGNATURE-----
 
 iQFSBAABCAA8FiEEzGIauY6CIA2RXMnEW8LFb64PMh8FAlxbUL4eHG1hcmsuY2F2
 ZS1heWxhbmRAaWxhbmRlLmNvLnVrAAoJEFvCxW+uDzIfwpYH/iaA9FLIS7Xkzg/X
 Ha4ADMUFYstUro+y4m55a7ULc7vVO92oEVAUyJmjCghjux+dyEws49V9EGli+53Q
 sGnXWkBHj1wmeLZ6VZGuFaU9JBdKGX3W2JfjwYzbsa84PhlonUlM3jqLqJpQQVSL
 DnHbs+8aSFKBA3gKlrDGCl5vkFTvfLtXNF+16UwjMjAVKdGO2udWcS6w+Lut28k0
 yt3HoqnXLv4voMA+Q3bSLinjWQlK7/mqL34zu1U/nQnSM5oW87WS7dp2ykk3Nav0
 GV60V+fsXmSLwJof3ZUbGAMSa8Ni51uUgH3hc4NBKFBn2uqIv/e2L/in01ZWhSzd
 vt3zwqo=
 =r5wm
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20190206' into staging

qemu-sparc queue

# gpg: Signature made Wed 06 Feb 2019 21:25:18 GMT
# gpg:                using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F
# gpg:                issuer "mark.cave-ayland@ilande.co.uk"
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full]
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C  C9C4 5BC2 C56F AE0F 321F

* remotes/mcayland/tags/qemu-sparc-20190206:
  sun4m: pass initrd size to OpenBIOS via fw_cfg interface
  sun4u: add power_mem_read routine
  hw/sparc64: Create VGA device only if it has really been requested

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2019-02-07 16:49:30 +00:00
commit d55451dcde
2 changed files with 29 additions and 12 deletions

View file

@ -224,11 +224,12 @@ static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
static unsigned long sun4m_load_kernel(const char *kernel_filename,
const char *initrd_filename,
ram_addr_t RAM_size)
ram_addr_t RAM_size,
uint32_t *initrd_size)
{
int linux_boot;
unsigned int i;
long initrd_size, kernel_size;
long kernel_size;
uint8_t *ptr;
linux_boot = (kernel_filename != NULL);
@ -259,23 +260,23 @@ static unsigned long sun4m_load_kernel(const char *kernel_filename,
}
/* load initrd */
initrd_size = 0;
*initrd_size = 0;
if (initrd_filename) {
initrd_size = load_image_targphys(initrd_filename,
INITRD_LOAD_ADDR,
RAM_size - INITRD_LOAD_ADDR);
if (initrd_size < 0) {
*initrd_size = load_image_targphys(initrd_filename,
INITRD_LOAD_ADDR,
RAM_size - INITRD_LOAD_ADDR);
if ((int)*initrd_size < 0) {
error_report("could not load initial ram disk '%s'",
initrd_filename);
exit(1);
}
}
if (initrd_size > 0) {
if (*initrd_size > 0) {
for (i = 0; i < 64 * TARGET_PAGE_SIZE; i += TARGET_PAGE_SIZE) {
ptr = rom_ptr(KERNEL_LOAD_ADDR + i, 24);
if (ptr && ldl_p(ptr) == 0x48647253) { /* HdrS */
stl_p(ptr + 16, INITRD_LOAD_ADDR);
stl_p(ptr + 20, initrd_size);
stl_p(ptr + 20, *initrd_size);
break;
}
}
@ -846,6 +847,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
qemu_irq *cpu_irqs[MAX_CPUS], slavio_irq[32], slavio_cpu_irq[MAX_CPUS];
qemu_irq fdc_tc;
unsigned long kernel_size;
uint32_t initrd_size;
DriveInfo *fd[MAX_FD];
FWCfgState *fw_cfg;
unsigned int num_vsimms;
@ -1024,9 +1026,10 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
empty_slot_init(hwdef->bpp_base, 0x20);
}
initrd_size = 0;
kernel_size = sun4m_load_kernel(machine->kernel_filename,
machine->initrd_filename,
machine->ram_size);
machine->ram_size, &initrd_size);
nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, machine->kernel_cmdline,
machine->boot_order, machine->ram_size, kernel_size,
@ -1069,7 +1072,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, 0);
}
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, INITRD_LOAD_ADDR);
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, 0); // not used
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, machine->boot_order[0]);
qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
}

View file

@ -213,6 +213,11 @@ typedef struct PowerDevice {
} PowerDevice;
/* Power */
static uint64_t power_mem_read(void *opaque, hwaddr addr, unsigned size)
{
return 0;
}
static void power_mem_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
@ -223,6 +228,7 @@ static void power_mem_write(void *opaque, hwaddr addr,
}
static const MemoryRegionOps power_mem_ops = {
.read = power_mem_read,
.write = power_mem_write,
.endianness = DEVICE_NATIVE_ENDIAN,
.valid = {
@ -595,7 +601,15 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
qdev_connect_gpio_out_named(DEVICE(ebus), "isa-irq", 4,
qdev_get_gpio_in_named(DEVICE(sabre), "pbm-irq", OBIO_SER_IRQ));
pci_dev = pci_create_simple(pci_busA, PCI_DEVFN(2, 0), "VGA");
switch (vga_interface_type) {
case VGA_STD:
pci_create_simple(pci_busA, PCI_DEVFN(2, 0), "VGA");
break;
case VGA_NONE:
break;
default:
abort(); /* Should not happen - types are checked in vl.c already */
}
memset(&macaddr, 0, sizeof(MACAddr));
onboard_nic = false;