target/arm: Fetch GICv3 state directly from CPUARMState
This eliminates the need for fetching it from el_change_hook_opaque, and allows for supporting multiple el_change_hooks without having to hack something together to find the registered opaque belonging to GICv3. Signed-off-by: Aaron Lindsay <alindsay@codeaurora.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1523997485-1905-6-git-send-email-alindsay@codeaurora.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -29,11 +29,7 @@ void gicv3_set_gicv3state(CPUState *cpu, GICv3CPUState *s)
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static GICv3CPUState *icc_cs_from_env(CPUARMState *env)
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{
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/* Given the CPU, find the right GICv3CPUState struct.
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* Since we registered the CPU interface with the EL change hook as
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* the opaque pointer, we can just directly get from the CPU to it.
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*/
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return arm_get_el_change_hook_opaque(arm_env_get_cpu(env));
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return env->gicv3state;
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}
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static bool gicv3_use_ns_bank(CPUARMState *env)
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@ -2615,9 +2611,7 @@ void gicv3_init_cpuif(GICv3State *s)
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* it might be with code translated by CPU 0 but run by CPU 1, in
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* which case we'd get the wrong value.
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* So instead we define the regs with no ri->opaque info, and
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* get back to the GICv3CPUState from the ARMCPU by reading back
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* the opaque pointer from the el_change_hook, which we're going
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* to need to register anyway.
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* get back to the GICv3CPUState from the CPUARMState.
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*/
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define_arm_cp_regs(cpu, gicv3_cpuif_reginfo);
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if (arm_feature(&cpu->env, ARM_FEATURE_EL2)
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@ -2902,16 +2902,6 @@ static inline AddressSpace *arm_addressspace(CPUState *cs, MemTxAttrs attrs)
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void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHook *hook,
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void *opaque);
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/**
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* arm_get_el_change_hook_opaque:
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* Return the opaque data that will be used by the el_change_hook
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* for this CPU.
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*/
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static inline void *arm_get_el_change_hook_opaque(ARMCPU *cpu)
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{
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return cpu->el_change_hook_opaque;
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}
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/**
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* aa32_vfp_dreg:
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* Return a pointer to the Dn register within env in 32-bit mode.
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