tcg-aarch64: Reuse LR in translated code
It's obviously call-clobbered, but is otherwise unused. Repurpose it as the TCG temporary. Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -23,10 +23,7 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
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"%x0", "%x1", "%x2", "%x3", "%x4", "%x5", "%x6", "%x7",
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"%x8", "%x9", "%x10", "%x11", "%x12", "%x13", "%x14", "%x15",
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"%x16", "%x17", "%x18", "%x19", "%x20", "%x21", "%x22", "%x23",
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"%x24", "%x25", "%x26", "%x27", "%x28",
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"%fp", /* frame pointer */
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"%lr", /* link register */
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"%sp", /* stack pointer */
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"%x24", "%x25", "%x26", "%x27", "%x28", "%fp", "%x30", "%sp",
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};
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#endif /* NDEBUG */
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@ -41,16 +38,17 @@ static const int tcg_target_reg_alloc_order[] = {
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TCG_REG_X24, TCG_REG_X25, TCG_REG_X26, TCG_REG_X27,
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TCG_REG_X28, /* we will reserve this for GUEST_BASE if configured */
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TCG_REG_X9, TCG_REG_X10, TCG_REG_X11, TCG_REG_X12,
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TCG_REG_X13, TCG_REG_X14, TCG_REG_X15,
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TCG_REG_X8, TCG_REG_X9, TCG_REG_X10, TCG_REG_X11,
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TCG_REG_X12, TCG_REG_X13, TCG_REG_X14, TCG_REG_X15,
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TCG_REG_X16, TCG_REG_X17,
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TCG_REG_X18, TCG_REG_X19, /* will not use these, see tcg_target_init */
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TCG_REG_X0, TCG_REG_X1, TCG_REG_X2, TCG_REG_X3,
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TCG_REG_X4, TCG_REG_X5, TCG_REG_X6, TCG_REG_X7,
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TCG_REG_X8, /* will not use, see tcg_target_init */
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/* X18 reserved by system */
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/* X19 reserved for AREG0 */
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/* X29 reserved as fp */
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/* X30 reserved as temporary */
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};
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static const int tcg_target_call_iarg_regs[8] = {
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@ -61,10 +59,10 @@ static const int tcg_target_call_oarg_regs[1] = {
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TCG_REG_X0
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};
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#define TCG_REG_TMP TCG_REG_X8
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#define TCG_REG_TMP TCG_REG_X30
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#ifndef CONFIG_SOFTMMU
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# if defined(CONFIG_USE_GUEST_BASE)
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# ifdef CONFIG_USE_GUEST_BASE
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# define TCG_REG_GUEST_BASE TCG_REG_X28
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# else
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# define TCG_REG_GUEST_BASE TCG_REG_XZR
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@ -1871,7 +1869,7 @@ static void tcg_target_init(TCGContext *s)
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(1 << TCG_REG_X12) | (1 << TCG_REG_X13) |
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(1 << TCG_REG_X14) | (1 << TCG_REG_X15) |
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(1 << TCG_REG_X16) | (1 << TCG_REG_X17) |
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(1 << TCG_REG_X18));
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(1 << TCG_REG_X18) | (1 << TCG_REG_X30));
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tcg_regset_clear(s->reserved_regs);
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_SP);
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@ -1902,13 +1900,13 @@ static void tcg_target_qemu_prologue(TCGContext *s)
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tcg_out_push_pair(s, TCG_REG_SP,
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TCG_REG_FP, TCG_REG_LR, frame_size_callee_saved);
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/* FP -> callee_saved */
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/* Set up frame pointer for canonical unwinding. */
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tcg_out_movr_sp(s, TCG_TYPE_I64, TCG_REG_FP, TCG_REG_SP);
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/* store callee-preserved regs x19..x28 using FP -> callee_saved */
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/* Store callee-preserved regs x19..x28. */
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for (r = TCG_REG_X19; r <= TCG_REG_X27; r += 2) {
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int idx = (r - TCG_REG_X19) / 2 + 1;
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tcg_out_store_pair(s, TCG_REG_FP, r, r + 1, idx);
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tcg_out_store_pair(s, TCG_REG_SP, r, r + 1, idx);
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}
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/* Make stack space for TCG locals. */
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@ -1939,7 +1937,7 @@ static void tcg_target_qemu_prologue(TCGContext *s)
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FP must be preserved, so it still points to callee_saved area */
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for (r = TCG_REG_X19; r <= TCG_REG_X27; r += 2) {
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int idx = (r - TCG_REG_X19) / 2 + 1;
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tcg_out_load_pair(s, TCG_REG_FP, r, r + 1, idx);
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tcg_out_load_pair(s, TCG_REG_SP, r, r + 1, idx);
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}
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/* pop (FP, LR), restore SP to previous frame, return */
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@ -17,17 +17,23 @@
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#undef TCG_TARGET_STACK_GROWSUP
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typedef enum {
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TCG_REG_X0, TCG_REG_X1, TCG_REG_X2, TCG_REG_X3, TCG_REG_X4,
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TCG_REG_X5, TCG_REG_X6, TCG_REG_X7, TCG_REG_X8, TCG_REG_X9,
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TCG_REG_X10, TCG_REG_X11, TCG_REG_X12, TCG_REG_X13, TCG_REG_X14,
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TCG_REG_X15, TCG_REG_X16, TCG_REG_X17, TCG_REG_X18, TCG_REG_X19,
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TCG_REG_X20, TCG_REG_X21, TCG_REG_X22, TCG_REG_X23, TCG_REG_X24,
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TCG_REG_X25, TCG_REG_X26, TCG_REG_X27, TCG_REG_X28,
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TCG_REG_FP, /* frame pointer */
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TCG_REG_LR, /* link register */
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TCG_REG_SP, /* stack pointer or zero register */
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TCG_REG_XZR = TCG_REG_SP /* same register number */
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/* program counter is not directly accessible! */
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TCG_REG_X0, TCG_REG_X1, TCG_REG_X2, TCG_REG_X3,
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TCG_REG_X4, TCG_REG_X5, TCG_REG_X6, TCG_REG_X7,
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TCG_REG_X8, TCG_REG_X9, TCG_REG_X10, TCG_REG_X11,
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TCG_REG_X12, TCG_REG_X13, TCG_REG_X14, TCG_REG_X15,
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TCG_REG_X16, TCG_REG_X17, TCG_REG_X18, TCG_REG_X19,
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TCG_REG_X20, TCG_REG_X21, TCG_REG_X22, TCG_REG_X23,
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TCG_REG_X24, TCG_REG_X25, TCG_REG_X26, TCG_REG_X27,
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TCG_REG_X28, TCG_REG_X29, TCG_REG_X30,
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/* X31 is either the stack pointer or zero, depending on context. */
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TCG_REG_SP = 31,
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TCG_REG_XZR = 31,
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/* Aliases. */
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TCG_REG_FP = TCG_REG_X29,
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TCG_REG_LR = TCG_REG_X30,
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TCG_AREG0 = TCG_REG_X19,
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} TCGReg;
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#define TCG_TARGET_NB_REGS 32
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@ -92,10 +98,6 @@ typedef enum {
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#define TCG_TARGET_HAS_muluh_i64 1
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#define TCG_TARGET_HAS_mulsh_i64 1
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enum {
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TCG_AREG0 = TCG_REG_X19,
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};
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#define TCG_TARGET_HAS_new_ldst 0
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static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
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