tcg-arm: Allow constant first argument to sub
This allows the generation of RSB instructions. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -1625,8 +1625,17 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
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args[0], args[1], args[2], const_args[2]);
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break;
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case INDEX_op_sub_i32:
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if (const_args[1]) {
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if (const_args[2]) {
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tcg_out_movi32(s, COND_AL, args[0], args[1] - args[2]);
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} else {
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tcg_out_dat_rI(s, COND_AL, ARITH_RSB,
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args[0], args[2], args[1], 1);
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}
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} else {
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tcg_out_dat_rIN(s, COND_AL, ARITH_SUB, ARITH_ADD,
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args[0], args[1], args[2], const_args[2]);
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}
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break;
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case INDEX_op_and_i32:
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tcg_out_dat_rIK(s, COND_AL, ARITH_AND, ARITH_BIC,
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@ -1819,7 +1828,7 @@ static const TCGTargetOpDef arm_op_defs[] = {
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/* TODO: "r", "r", "ri" */
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{ INDEX_op_add_i32, { "r", "r", "rIN" } },
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{ INDEX_op_sub_i32, { "r", "r", "rIN" } },
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{ INDEX_op_sub_i32, { "r", "rI", "rIN" } },
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{ INDEX_op_mul_i32, { "r", "r", "r" } },
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{ INDEX_op_mulu2_i32, { "r", "r", "r", "r" } },
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{ INDEX_op_muls2_i32, { "r", "r", "r", "r" } },
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