target/ppc: Properly sync cpu state with new msr in cpu_load_old
Match cpu_post_load in using ppc_store_msr to set all of the cpu state implied by the value of msr. Do not restore hflags or hflags_nmsr, as we recompute them in ppc_store_msr. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210315184615.1985590-4-richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -21,6 +21,7 @@ static int cpu_load_old(QEMUFile *f, void *opaque, int version_id)
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int32_t slb_nr;
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#endif
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target_ulong xer;
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target_ulong msr;
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for (i = 0; i < 32; i++) {
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qemu_get_betls(f, &env->gpr[i]);
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@ -111,11 +112,19 @@ static int cpu_load_old(QEMUFile *f, void *opaque, int version_id)
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qemu_get_betls(f, &env->ivpr_mask);
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qemu_get_betls(f, &env->hreset_vector);
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qemu_get_betls(f, &env->nip);
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qemu_get_betls(f, &env->hflags);
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qemu_get_betls(f, &env->hflags_nmsr);
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qemu_get_sbetl(f); /* Discard unused hflags */
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qemu_get_sbetl(f); /* Discard unused hflags_nmsr */
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qemu_get_sbe32(f); /* Discard unused mmu_idx */
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qemu_get_sbe32(f); /* Discard unused power_mode */
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/*
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* Invalidate all supported msr bits except MSR_TGPR/MSR_HVB
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* before restoring. Note that this recomputes hflags and mem_idx.
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*/
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msr = env->msr;
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env->msr ^= env->msr_mask & ~((1ULL << MSR_TGPR) | MSR_HVB);
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ppc_store_msr(env, msr);
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/* Recompute mmu indices */
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hreg_compute_mem_idx(env);
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