hw/mips_malta: remove redundant irq and clock init
Global smp_cpus is never zero (even if user provides -smp 0), thus clocks and irqs are always initialized for each created CPU in the loop at the beginning of mips_malta_init. These two lines cause a leak of already allocated timer and irqs for the first CPU - remove them. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
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@ -1135,10 +1135,6 @@ void mips_malta_init(MachineState *machine)
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/* Board ID = 0x420 (Malta Board with CoreLV) */
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stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420);
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/* Init internal devices */
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cpu_mips_irq_init_cpu(env);
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cpu_mips_clock_init(env);
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/*
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* We have a circular dependency problem: pci_bus depends on isa_irq,
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* isa_irq is provided by i8259, i8259 depends on ISA, ISA depends
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