target/ppc: Remove fallback 64k pagesize information
CPU definitions for cpus with the 64-bit hash MMU can include a table of available pagesizes. If this isn't supplied ppc_cpu_instance_init() will fill it in a fallback table based on the POWERPC_MMU_64K bit in mmu_model. However, it turns out all the cpus which support 64K pages already include an explicit table of page sizes, so there's no point to the fallback table including 64k pages. That removes the only place which tests POWERPC_MMU_64K, so we can remove it. Which in turn allows some logic to be removed from kvm_fixup_page_sizes(). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org>
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@ -70,7 +70,6 @@ enum powerpc_mmu_t {
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#define POWERPC_MMU_64 0x00010000
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#define POWERPC_MMU_1TSEG 0x00020000
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#define POWERPC_MMU_AMR 0x00040000
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#define POWERPC_MMU_64K 0x00080000
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#define POWERPC_MMU_V3 0x00100000 /* ISA V3.00 MMU Support */
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/* 64 bits PowerPC MMU */
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POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001,
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@ -78,15 +77,12 @@ enum powerpc_mmu_t {
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POWERPC_MMU_2_03 = POWERPC_MMU_64 | 0x00000002,
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/* Architecture 2.06 variant */
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POWERPC_MMU_2_06 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
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| POWERPC_MMU_64K
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| POWERPC_MMU_AMR | 0x00000003,
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/* Architecture 2.07 variant */
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POWERPC_MMU_2_07 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
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| POWERPC_MMU_64K
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| POWERPC_MMU_AMR | 0x00000004,
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/* Architecture 3.00 variant */
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POWERPC_MMU_3_00 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
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| POWERPC_MMU_64K
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| POWERPC_MMU_AMR | POWERPC_MMU_V3
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| 0x00000005,
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};
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@ -425,7 +425,6 @@ static void kvm_fixup_page_sizes(PowerPCCPU *cpu)
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static bool has_smmu_info;
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CPUPPCState *env = &cpu->env;
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int iq, ik, jq, jk;
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bool has_64k_pages = false;
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/* We only handle page sizes for 64-bit server guests for now */
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if (!(env->mmu_model & POWERPC_MMU_64)) {
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@ -471,9 +470,6 @@ static void kvm_fixup_page_sizes(PowerPCCPU *cpu)
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ksps->enc[jk].page_shift)) {
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continue;
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}
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if (ksps->enc[jk].page_shift == 16) {
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has_64k_pages = true;
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}
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qsps->enc[jq].page_shift = ksps->enc[jk].page_shift;
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qsps->enc[jq].pte_enc = ksps->enc[jk].pte_enc;
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if (++jq >= PPC_PAGE_SIZES_MAX_SZ) {
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@ -488,9 +484,6 @@ static void kvm_fixup_page_sizes(PowerPCCPU *cpu)
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if (!(smmu_info.flags & KVM_PPC_1T_SEGMENTS)) {
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env->mmu_model &= ~POWERPC_MMU_1TSEG;
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}
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if (!has_64k_pages) {
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env->mmu_model &= ~POWERPC_MMU_64K;
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}
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}
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bool kvmppc_is_mem_backend_page_size_ok(const char *obj_path)
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@ -10469,7 +10469,7 @@ static void ppc_cpu_instance_init(Object *obj)
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env->sps = *pcc->sps;
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} else if (env->mmu_model & POWERPC_MMU_64) {
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/* Use default sets of page sizes. We don't support MPSS */
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static const struct ppc_segment_page_sizes defsps_4k = {
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static const struct ppc_segment_page_sizes defsps = {
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.sps = {
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{ .page_shift = 12, /* 4K */
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.slb_enc = 0,
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@ -10481,23 +10481,7 @@ static void ppc_cpu_instance_init(Object *obj)
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},
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},
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};
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static const struct ppc_segment_page_sizes defsps_64k = {
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.sps = {
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{ .page_shift = 12, /* 4K */
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.slb_enc = 0,
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.enc = { { .page_shift = 12, .pte_enc = 0 } }
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},
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{ .page_shift = 16, /* 64K */
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.slb_enc = 0x110,
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.enc = { { .page_shift = 16, .pte_enc = 1 } }
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},
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{ .page_shift = 24, /* 16M */
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.slb_enc = 0x100,
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.enc = { { .page_shift = 24, .pte_enc = 0 } }
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},
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},
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};
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env->sps = (env->mmu_model & POWERPC_MMU_64K) ? defsps_64k : defsps_4k;
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env->sps = defsps;
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}
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#endif /* defined(TARGET_PPC64) */
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}
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