ppc-40x: Correct ESR for zone protection faults.

Raise the zone protection fault in ESR for TLB faults caused by
zone protection bits.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
This commit is contained in:
Edgar E. Iglesias 2010-01-11 15:32:47 +01:00
parent ec5c3e487e
commit dcbc9a70af

View file

@ -1171,6 +1171,8 @@ static int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
break; break;
case 0x0: case 0x0:
if (pr != 0) { if (pr != 0) {
/* Raise Zone protection fault. */
env->spr[SPR_40x_ESR] = 1 << 22;
ctx->prot = 0; ctx->prot = 0;
ret = -2; ret = -2;
break; break;
@ -1183,6 +1185,8 @@ static int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
ctx->prot = tlb->prot; ctx->prot = tlb->prot;
ctx->prot |= PAGE_EXEC; ctx->prot |= PAGE_EXEC;
ret = check_prot(ctx->prot, rw, access_type); ret = check_prot(ctx->prot, rw, access_type);
if (ret == -2)
env->spr[SPR_40x_ESR] = 0;
break; break;
} }
if (ret >= 0) { if (ret >= 0) {
@ -1580,11 +1584,20 @@ int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
/* Access rights violation */ /* Access rights violation */
env->exception_index = POWERPC_EXCP_DSI; env->exception_index = POWERPC_EXCP_DSI;
env->error_code = 0; env->error_code = 0;
env->spr[SPR_DAR] = address; if (env->mmu_model == POWERPC_MMU_SOFT_4xx
if (rw == 1) || env->mmu_model == POWERPC_MMU_SOFT_4xx_Z) {
env->spr[SPR_DSISR] = 0x0A000000; env->spr[SPR_40x_DEAR] = address;
else if (rw) {
env->spr[SPR_DSISR] = 0x08000000; env->spr[SPR_40x_ESR] |= 0x00800000;
}
} else {
env->spr[SPR_DAR] = address;
if (rw == 1) {
env->spr[SPR_DSISR] = 0x0A000000;
} else {
env->spr[SPR_DSISR] = 0x08000000;
}
}
break; break;
case -4: case -4:
/* Direct store exception */ /* Direct store exception */