target/m68k: add fscc.
use DisasCompare with FPU conditions in fscc and fbcc. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170628204241.32106-2-laurent@vivier.eu>
This commit is contained in:
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4c8c1cc544
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dd337bf862
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@ -4633,142 +4633,193 @@ undef:
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disas_undef_fpu(env, s, insn);
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}
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static void gen_fcc_cond(DisasCompare *c, DisasContext *s, int cond)
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{
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TCGv fpsr;
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c->g1 = 1;
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c->v2 = tcg_const_i32(0);
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c->g2 = 0;
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/* TODO: Raise BSUN exception. */
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fpsr = tcg_temp_new();
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gen_load_fcr(s, fpsr, M68K_FPSR);
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switch (cond) {
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case 0: /* False */
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case 16: /* Signaling False */
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c->v1 = c->v2;
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c->tcond = TCG_COND_NEVER;
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break;
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case 1: /* EQual Z */
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case 17: /* Signaling EQual Z */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_Z);
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c->tcond = TCG_COND_NE;
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break;
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case 2: /* Ordered Greater Than !(A || Z || N) */
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case 18: /* Greater Than !(A || Z || N) */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr,
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FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N);
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c->tcond = TCG_COND_EQ;
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break;
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case 3: /* Ordered Greater than or Equal Z || !(A || N) */
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case 19: /* Greater than or Equal Z || !(A || N) */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A);
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tcg_gen_shli_i32(c->v1, c->v1, ctz32(FPSR_CC_N) - ctz32(FPSR_CC_A));
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tcg_gen_andi_i32(fpsr, fpsr, FPSR_CC_Z | FPSR_CC_N);
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tcg_gen_or_i32(c->v1, c->v1, fpsr);
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tcg_gen_xori_i32(c->v1, c->v1, FPSR_CC_N);
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c->tcond = TCG_COND_NE;
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break;
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case 4: /* Ordered Less Than !(!N || A || Z); */
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case 20: /* Less Than !(!N || A || Z); */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_xori_i32(c->v1, fpsr, FPSR_CC_N);
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tcg_gen_andi_i32(c->v1, c->v1, FPSR_CC_N | FPSR_CC_A | FPSR_CC_Z);
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c->tcond = TCG_COND_EQ;
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break;
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case 5: /* Ordered Less than or Equal Z || (N && !A) */
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case 21: /* Less than or Equal Z || (N && !A) */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A);
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tcg_gen_shli_i32(c->v1, c->v1, ctz32(FPSR_CC_N) - ctz32(FPSR_CC_A));
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tcg_gen_andc_i32(c->v1, fpsr, c->v1);
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tcg_gen_andi_i32(c->v1, c->v1, FPSR_CC_Z | FPSR_CC_N);
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c->tcond = TCG_COND_NE;
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break;
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case 6: /* Ordered Greater or Less than !(A || Z) */
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case 22: /* Greater or Less than !(A || Z) */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z);
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c->tcond = TCG_COND_EQ;
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break;
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case 7: /* Ordered !A */
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case 23: /* Greater, Less or Equal !A */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A);
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c->tcond = TCG_COND_EQ;
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break;
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case 8: /* Unordered A */
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case 24: /* Not Greater, Less or Equal A */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A);
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c->tcond = TCG_COND_NE;
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break;
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case 9: /* Unordered or Equal A || Z */
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case 25: /* Not Greater or Less then A || Z */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z);
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c->tcond = TCG_COND_NE;
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break;
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case 10: /* Unordered or Greater Than A || !(N || Z)) */
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case 26: /* Not Less or Equal A || !(N || Z)) */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_Z);
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tcg_gen_shli_i32(c->v1, c->v1, ctz32(FPSR_CC_N) - ctz32(FPSR_CC_Z));
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tcg_gen_andi_i32(fpsr, fpsr, FPSR_CC_A | FPSR_CC_N);
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tcg_gen_or_i32(c->v1, c->v1, fpsr);
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tcg_gen_xori_i32(c->v1, c->v1, FPSR_CC_N);
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c->tcond = TCG_COND_NE;
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break;
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case 11: /* Unordered or Greater or Equal A || Z || !N */
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case 27: /* Not Less Than A || Z || !N */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N);
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tcg_gen_xori_i32(c->v1, c->v1, FPSR_CC_N);
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c->tcond = TCG_COND_NE;
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break;
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case 12: /* Unordered or Less Than A || (N && !Z) */
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case 28: /* Not Greater than or Equal A || (N && !Z) */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_Z);
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tcg_gen_shli_i32(c->v1, c->v1, ctz32(FPSR_CC_N) - ctz32(FPSR_CC_Z));
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tcg_gen_andc_i32(c->v1, fpsr, c->v1);
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tcg_gen_andi_i32(c->v1, c->v1, FPSR_CC_A | FPSR_CC_N);
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c->tcond = TCG_COND_NE;
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break;
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case 13: /* Unordered or Less or Equal A || Z || N */
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case 29: /* Not Greater Than A || Z || N */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N);
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c->tcond = TCG_COND_NE;
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break;
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case 14: /* Not Equal !Z */
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case 30: /* Signaling Not Equal !Z */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_Z);
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c->tcond = TCG_COND_EQ;
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break;
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case 15: /* True */
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case 31: /* Signaling True */
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c->v1 = c->v2;
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c->tcond = TCG_COND_ALWAYS;
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break;
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}
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tcg_temp_free(fpsr);
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}
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static void gen_fjmpcc(DisasContext *s, int cond, TCGLabel *l1)
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{
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DisasCompare c;
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gen_fcc_cond(&c, s, cond);
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tcg_gen_brcond_i32(c.tcond, c.v1, c.v2, l1);
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free_cond(&c);
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}
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DISAS_INSN(fbcc)
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{
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uint32_t offset;
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uint32_t addr;
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uint32_t base;
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TCGLabel *l1;
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TCGv tmp, fpsr;
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addr = s->pc;
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offset = cpu_ldsw_code(env, s->pc);
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s->pc += 2;
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base = s->pc;
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offset = (int16_t)read_im16(env, s);
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if (insn & (1 << 6)) {
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offset = (offset << 16) | read_im16(env, s);
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}
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fpsr = tcg_temp_new();
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gen_load_fcr(s, fpsr, M68K_FPSR);
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l1 = gen_new_label();
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/* TODO: Raise BSUN exception. */
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/* Jump to l1 if condition is true. */
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switch (insn & 0x3f) {
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case 0: /* False */
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case 16: /* Signaling False */
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break;
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case 1: /* EQual Z */
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case 17: /* Signaling EQual Z */
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tmp = tcg_temp_new();
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tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_Z);
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tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
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break;
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case 2: /* Ordered Greater Than !(A || Z || N) */
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case 18: /* Greater Than !(A || Z || N) */
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tmp = tcg_temp_new();
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tcg_gen_andi_i32(tmp, fpsr,
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FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N);
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tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
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break;
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case 3: /* Ordered Greater than or Equal Z || !(A || N) */
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case 19: /* Greater than or Equal Z || !(A || N) */
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assert(FPSR_CC_A == (FPSR_CC_N >> 3));
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tmp = tcg_temp_new();
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tcg_gen_shli_i32(tmp, fpsr, 3);
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tcg_gen_or_i32(tmp, tmp, fpsr);
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tcg_gen_xori_i32(tmp, tmp, FPSR_CC_N);
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tcg_gen_andi_i32(tmp, tmp, FPSR_CC_N | FPSR_CC_Z);
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tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
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break;
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case 4: /* Ordered Less Than !(!N || A || Z); */
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case 20: /* Less Than !(!N || A || Z); */
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tmp = tcg_temp_new();
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tcg_gen_xori_i32(tmp, fpsr, FPSR_CC_N);
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tcg_gen_andi_i32(tmp, tmp, FPSR_CC_N | FPSR_CC_A | FPSR_CC_Z);
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tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
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break;
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case 5: /* Ordered Less than or Equal Z || (N && !A) */
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case 21: /* Less than or Equal Z || (N && !A) */
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assert(FPSR_CC_A == (FPSR_CC_N >> 3));
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tmp = tcg_temp_new();
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tcg_gen_xori_i32(tmp, fpsr, FPSR_CC_A);
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tcg_gen_shli_i32(tmp, tmp, 3);
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tcg_gen_ori_i32(tmp, tmp, FPSR_CC_Z);
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tcg_gen_and_i32(tmp, tmp, fpsr);
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tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
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break;
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case 6: /* Ordered Greater or Less than !(A || Z) */
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case 22: /* Greater or Less than !(A || Z) */
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tmp = tcg_temp_new();
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tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A | FPSR_CC_Z);
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tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
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break;
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case 7: /* Ordered !A */
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case 23: /* Greater, Less or Equal !A */
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tmp = tcg_temp_new();
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tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A);
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tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
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break;
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case 8: /* Unordered A */
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case 24: /* Not Greater, Less or Equal A */
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tmp = tcg_temp_new();
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tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A);
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tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
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break;
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case 9: /* Unordered or Equal A || Z */
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case 25: /* Not Greater or Less then A || Z */
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tmp = tcg_temp_new();
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tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A | FPSR_CC_Z);
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tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
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break;
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case 10: /* Unordered or Greater Than A || !(N || Z)) */
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case 26: /* Not Less or Equal A || !(N || Z)) */
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assert(FPSR_CC_Z == (FPSR_CC_N >> 1));
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tmp = tcg_temp_new();
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tcg_gen_shli_i32(tmp, fpsr, 1);
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tcg_gen_or_i32(tmp, tmp, fpsr);
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tcg_gen_xori_i32(tmp, tmp, FPSR_CC_N);
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tcg_gen_andi_i32(tmp, tmp, FPSR_CC_N | FPSR_CC_A);
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tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
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break;
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case 11: /* Unordered or Greater or Equal A || Z || !N */
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case 27: /* Not Less Than A || Z || !N */
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tmp = tcg_temp_new();
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tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N);
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tcg_gen_xori_i32(tmp, tmp, FPSR_CC_N);
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tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
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break;
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case 12: /* Unordered or Less Than A || (N && !Z) */
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case 28: /* Not Greater than or Equal A || (N && !Z) */
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assert(FPSR_CC_Z == (FPSR_CC_N >> 1));
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tmp = tcg_temp_new();
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tcg_gen_xori_i32(tmp, fpsr, FPSR_CC_Z);
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tcg_gen_shli_i32(tmp, tmp, 1);
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tcg_gen_ori_i32(tmp, tmp, FPSR_CC_A);
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tcg_gen_and_i32(tmp, tmp, fpsr);
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tcg_gen_andi_i32(tmp, tmp, FPSR_CC_A | FPSR_CC_N);
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tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
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break;
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case 13: /* Unordered or Less or Equal A || Z || N */
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case 29: /* Not Greater Than A || Z || N */
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tmp = tcg_temp_new();
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tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N);
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tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
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break;
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case 14: /* Not Equal !Z */
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case 30: /* Signaling Not Equal !Z */
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tmp = tcg_temp_new();
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tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_Z);
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tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
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break;
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case 15: /* True */
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case 31: /* Signaling True */
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tcg_gen_br(l1);
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break;
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}
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tcg_temp_free(fpsr);
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update_cc_op(s);
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gen_fjmpcc(s, insn & 0x3f, l1);
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gen_jmp_tb(s, 0, s->pc);
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gen_set_label(l1);
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gen_jmp_tb(s, 1, addr + offset);
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gen_jmp_tb(s, 1, base + offset);
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}
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DISAS_INSN(fscc)
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{
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DisasCompare c;
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int cond;
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TCGv tmp;
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uint16_t ext;
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ext = read_im16(env, s);
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cond = ext & 0x3f;
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gen_fcc_cond(&c, s, cond);
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tmp = tcg_temp_new();
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tcg_gen_setcond_i32(c.tcond, tmp, c.v1, c.v2);
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free_cond(&c);
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tcg_gen_neg_i32(tmp, tmp);
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DEST_EA(env, insn, OS_BYTE, tmp, NULL);
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tcg_temp_free(tmp);
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}
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DISAS_INSN(frestore)
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@ -5349,6 +5400,7 @@ void register_m68k_insns (CPUM68KState *env)
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INSN(frestore, f340, ffc0, CF_FPU);
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INSN(fsave, f300, ffc0, CF_FPU);
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INSN(fpu, f200, ffc0, FPU);
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INSN(fscc, f240, ffc0, FPU);
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INSN(fbcc, f280, ff80, FPU);
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INSN(frestore, f340, ffc0, FPU);
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INSN(fsave, f300, ffc0, FPU);
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