ahci: Do not map cmd_fis to generate response
The Register D2H FIS should copy the current values of the registers instead of just parroting back the same values the guest sent back to it. In this case, the SECTOR COUNT variables are actually not generally meaningful in terms of standard commands (See ATA8-AC3 Section 9.2 Normal Outputs), so it actually probably doesn't matter what we put in here. Meanwhile, we do need to use the Register update FIS from the NCQ pathways (in error cases), so getting rid of references to cur_cmd here is a win for AHCI concurrency. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1435767578-32743-14-git-send-email-jsnow@redhat.com
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@ -701,35 +701,13 @@ static void ahci_write_fis_sdb(AHCIState *s, int port, uint32_t finished)
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static void ahci_write_fis_pio(AHCIDevice *ad, uint16_t len)
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static void ahci_write_fis_pio(AHCIDevice *ad, uint16_t len)
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{
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{
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AHCIPortRegs *pr = &ad->port_regs;
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AHCIPortRegs *pr = &ad->port_regs;
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uint8_t *pio_fis, *cmd_fis;
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uint8_t *pio_fis;
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uint64_t tbl_addr;
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dma_addr_t cmd_len = 0x80;
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IDEState *s = &ad->port.ifs[0];
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IDEState *s = &ad->port.ifs[0];
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if (!ad->res_fis || !(pr->cmd & PORT_CMD_FIS_RX)) {
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if (!ad->res_fis || !(pr->cmd & PORT_CMD_FIS_RX)) {
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return;
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return;
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}
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}
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/* map cmd_fis */
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tbl_addr = le64_to_cpu(ad->cur_cmd->tbl_addr);
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cmd_fis = dma_memory_map(ad->hba->as, tbl_addr, &cmd_len,
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DMA_DIRECTION_TO_DEVICE);
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if (cmd_fis == NULL) {
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DPRINTF(ad->port_no, "dma_memory_map failed in ahci_write_fis_pio");
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ahci_trigger_irq(ad->hba, ad, PORT_IRQ_HBUS_ERR);
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return;
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}
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if (cmd_len != 0x80) {
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DPRINTF(ad->port_no,
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"dma_memory_map mapped too few bytes in ahci_write_fis_pio");
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dma_memory_unmap(ad->hba->as, cmd_fis, cmd_len,
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DMA_DIRECTION_TO_DEVICE, cmd_len);
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ahci_trigger_irq(ad->hba, ad, PORT_IRQ_HBUS_ERR);
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return;
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}
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pio_fis = &ad->res_fis[RES_FIS_PSFIS];
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pio_fis = &ad->res_fis[RES_FIS_PSFIS];
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pio_fis[0] = SATA_FIS_TYPE_PIO_SETUP;
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pio_fis[0] = SATA_FIS_TYPE_PIO_SETUP;
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@ -745,8 +723,8 @@ static void ahci_write_fis_pio(AHCIDevice *ad, uint16_t len)
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pio_fis[9] = s->hob_lcyl;
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pio_fis[9] = s->hob_lcyl;
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pio_fis[10] = s->hob_hcyl;
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pio_fis[10] = s->hob_hcyl;
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pio_fis[11] = 0;
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pio_fis[11] = 0;
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pio_fis[12] = cmd_fis[12];
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pio_fis[12] = s->nsector & 0xFF;
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pio_fis[13] = cmd_fis[13];
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pio_fis[13] = (s->nsector >> 8) & 0xFF;
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pio_fis[14] = 0;
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pio_fis[14] = 0;
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pio_fis[15] = s->status;
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pio_fis[15] = s->status;
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pio_fis[16] = len & 255;
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pio_fis[16] = len & 255;
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@ -763,9 +741,6 @@ static void ahci_write_fis_pio(AHCIDevice *ad, uint16_t len)
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}
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}
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ahci_trigger_irq(ad->hba, ad, PORT_IRQ_PIOS_FIS);
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ahci_trigger_irq(ad->hba, ad, PORT_IRQ_PIOS_FIS);
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dma_memory_unmap(ad->hba->as, cmd_fis, cmd_len,
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DMA_DIRECTION_TO_DEVICE, cmd_len);
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}
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}
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static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis)
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static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis)
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@ -773,22 +748,12 @@ static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis)
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AHCIPortRegs *pr = &ad->port_regs;
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AHCIPortRegs *pr = &ad->port_regs;
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uint8_t *d2h_fis;
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uint8_t *d2h_fis;
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int i;
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int i;
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dma_addr_t cmd_len = 0x80;
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int cmd_mapped = 0;
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IDEState *s = &ad->port.ifs[0];
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IDEState *s = &ad->port.ifs[0];
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if (!ad->res_fis || !(pr->cmd & PORT_CMD_FIS_RX)) {
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if (!ad->res_fis || !(pr->cmd & PORT_CMD_FIS_RX)) {
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return;
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return;
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}
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}
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if (!cmd_fis) {
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/* map cmd_fis */
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uint64_t tbl_addr = le64_to_cpu(ad->cur_cmd->tbl_addr);
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cmd_fis = dma_memory_map(ad->hba->as, tbl_addr, &cmd_len,
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DMA_DIRECTION_TO_DEVICE);
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cmd_mapped = 1;
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}
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d2h_fis = &ad->res_fis[RES_FIS_RFIS];
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d2h_fis = &ad->res_fis[RES_FIS_RFIS];
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d2h_fis[0] = SATA_FIS_TYPE_REGISTER_D2H;
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d2h_fis[0] = SATA_FIS_TYPE_REGISTER_D2H;
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@ -804,8 +769,8 @@ static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis)
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d2h_fis[9] = s->hob_lcyl;
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d2h_fis[9] = s->hob_lcyl;
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d2h_fis[10] = s->hob_hcyl;
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d2h_fis[10] = s->hob_hcyl;
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d2h_fis[11] = 0;
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d2h_fis[11] = 0;
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d2h_fis[12] = cmd_fis[12];
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d2h_fis[12] = s->nsector & 0xFF;
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d2h_fis[13] = cmd_fis[13];
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d2h_fis[13] = (s->nsector >> 8) & 0xFF;
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for (i = 14; i < 20; i++) {
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for (i = 14; i < 20; i++) {
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d2h_fis[i] = 0;
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d2h_fis[i] = 0;
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}
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}
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@ -819,11 +784,6 @@ static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis)
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}
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}
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ahci_trigger_irq(ad->hba, ad, PORT_IRQ_D2H_REG_FIS);
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ahci_trigger_irq(ad->hba, ad, PORT_IRQ_D2H_REG_FIS);
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if (cmd_mapped) {
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dma_memory_unmap(ad->hba->as, cmd_fis, cmd_len,
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DMA_DIRECTION_TO_DEVICE, cmd_len);
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}
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}
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}
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static int prdt_tbl_entry_size(const AHCI_SG *tbl)
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static int prdt_tbl_entry_size(const AHCI_SG *tbl)
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