riscv: rv32: Root page table address can be larger than 32-bit
For RV32, the root page table's PPN has 22 bits hence its address bits could be larger than the maximum bits that target_ulong is able to represent. Use hwaddr instead. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
This commit is contained in:
parent
7f8dcfeb87
commit
ddf7813228
|
@ -186,12 +186,12 @@ static int get_physical_address(CPURISCVState *env, hwaddr *physical,
|
||||||
|
|
||||||
*prot = 0;
|
*prot = 0;
|
||||||
|
|
||||||
target_ulong base;
|
hwaddr base;
|
||||||
int levels, ptidxbits, ptesize, vm, sum;
|
int levels, ptidxbits, ptesize, vm, sum;
|
||||||
int mxr = get_field(env->mstatus, MSTATUS_MXR);
|
int mxr = get_field(env->mstatus, MSTATUS_MXR);
|
||||||
|
|
||||||
if (env->priv_ver >= PRIV_VERSION_1_10_0) {
|
if (env->priv_ver >= PRIV_VERSION_1_10_0) {
|
||||||
base = get_field(env->satp, SATP_PPN) << PGSHIFT;
|
base = (hwaddr)get_field(env->satp, SATP_PPN) << PGSHIFT;
|
||||||
sum = get_field(env->mstatus, MSTATUS_SUM);
|
sum = get_field(env->mstatus, MSTATUS_SUM);
|
||||||
vm = get_field(env->satp, SATP_MODE);
|
vm = get_field(env->satp, SATP_MODE);
|
||||||
switch (vm) {
|
switch (vm) {
|
||||||
|
@ -211,7 +211,7 @@ static int get_physical_address(CPURISCVState *env, hwaddr *physical,
|
||||||
g_assert_not_reached();
|
g_assert_not_reached();
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
base = env->sptbr << PGSHIFT;
|
base = (hwaddr)(env->sptbr) << PGSHIFT;
|
||||||
sum = !get_field(env->mstatus, MSTATUS_PUM);
|
sum = !get_field(env->mstatus, MSTATUS_PUM);
|
||||||
vm = get_field(env->mstatus, MSTATUS_VM);
|
vm = get_field(env->mstatus, MSTATUS_VM);
|
||||||
switch (vm) {
|
switch (vm) {
|
||||||
|
@ -249,7 +249,7 @@ restart:
|
||||||
((1 << ptidxbits) - 1);
|
((1 << ptidxbits) - 1);
|
||||||
|
|
||||||
/* check that physical address of PTE is legal */
|
/* check that physical address of PTE is legal */
|
||||||
target_ulong pte_addr = base + idx * ptesize;
|
hwaddr pte_addr = base + idx * ptesize;
|
||||||
|
|
||||||
if (riscv_feature(env, RISCV_FEATURE_PMP) &&
|
if (riscv_feature(env, RISCV_FEATURE_PMP) &&
|
||||||
!pmp_hart_has_privs(env, pte_addr, sizeof(target_ulong),
|
!pmp_hart_has_privs(env, pte_addr, sizeof(target_ulong),
|
||||||
|
@ -261,7 +261,7 @@ restart:
|
||||||
#elif defined(TARGET_RISCV64)
|
#elif defined(TARGET_RISCV64)
|
||||||
target_ulong pte = ldq_phys(cs->as, pte_addr);
|
target_ulong pte = ldq_phys(cs->as, pte_addr);
|
||||||
#endif
|
#endif
|
||||||
target_ulong ppn = pte >> PTE_PPN_SHIFT;
|
hwaddr ppn = pte >> PTE_PPN_SHIFT;
|
||||||
|
|
||||||
if (!(pte & PTE_V)) {
|
if (!(pte & PTE_V)) {
|
||||||
/* Invalid PTE */
|
/* Invalid PTE */
|
||||||
|
|
Loading…
Reference in a new issue