Honor CPU_DUMP_FPU
-----BEGIN PGP SIGNATURE----- iQEcBAABAgAGBQJa/0v8AAoJEGTfOOivfiFfQBAH/ibCkCDSn/fkzlkGN0qFJ0/K c5WfsfKuyhI4OTQBzjsPZukGno/S7kBXchgE/1CIP5koi/39dksaHgXfnzwU/cFw iXnfNUvr1ifxsjW6GVNv4gTZV5XNWlgoROxxz/EhKSC+nbojxzpakBNZQy8C5atN oIdZP0RMcy6NhIM5iWTUXglJXYa/hdFkCo7vJDvMsBZcfCEuTo1inIKB3Q1OAq01 ZupZQEqpMAVra0N8TFs+qPR4fIMnfJZa0syo5Va/+lAkXI+Df1fKfmjIWQehBVOv BVfbWo/MoAh4WSrMK3V3kOEsI0wkTuz/zy9j3MhH/oDrbaIbRpf1TngLo9HMoSE= =SFv1 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/rth/tags/pull-fpu-20180518' into staging Honor CPU_DUMP_FPU # gpg: Signature made Fri 18 May 2018 22:56:12 BST # gpg: using RSA key 64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-fpu-20180518: target/xtensa: Honor CPU_DUMP_FPU target/unicore32: Honor CPU_DUMP_FPU target/sparc: Honor CPU_DUMP_FPU target/s390x: Honor CPU_DUMP_FPU target/riscv: Honor CPU_DUMP_FPU target/ppc: Honor CPU_DUMP_FPU target/mips: Honor CPU_DUMP_FPU target/alpha: Honor CPU_DUMP_FPU Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
dfa93a0b6e
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@ -442,20 +442,19 @@ void alpha_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
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cpu_fprintf(f, " PC " TARGET_FMT_lx " PS %02x\n",
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env->pc, extract32(env->flags, ENV_FLAG_PS_SHIFT, 8));
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for (i = 0; i < 31; i++) {
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cpu_fprintf(f, "IR%02d %s " TARGET_FMT_lx " ", i,
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linux_reg_names[i], cpu_alpha_load_gr(env, i));
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if ((i % 3) == 2)
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cpu_fprintf(f, "\n");
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cpu_fprintf(f, "IR%02d %s " TARGET_FMT_lx "%c", i,
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linux_reg_names[i], cpu_alpha_load_gr(env, i),
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(i % 3) == 2 ? '\n' : ' ');
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}
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cpu_fprintf(f, "lock_a " TARGET_FMT_lx " lock_v " TARGET_FMT_lx "\n",
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env->lock_addr, env->lock_value);
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for (i = 0; i < 31; i++) {
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cpu_fprintf(f, "FIR%02d " TARGET_FMT_lx " ", i,
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*((uint64_t *)(&env->fir[i])));
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if ((i % 3) == 2)
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cpu_fprintf(f, "\n");
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if (flags & CPU_DUMP_FPU) {
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for (i = 0; i < 31; i++) {
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cpu_fprintf(f, "FIR%02d %016" PRIx64 "%c", i, env->fir[i],
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(i % 3) == 2 ? '\n' : ' ');
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}
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}
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cpu_fprintf(f, "\n");
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}
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@ -20446,8 +20446,9 @@ void mips_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
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env->CP0_Config2, env->CP0_Config3);
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cpu_fprintf(f, " Config4 0x%08x Config5 0x%08x\n",
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env->CP0_Config4, env->CP0_Config5);
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if (env->hflags & MIPS_HFLAG_FPU)
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if ((flags & CPU_DUMP_FPU) && (env->hflags & MIPS_HFLAG_FPU)) {
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fpu_dump_state(env, f, cpu_fprintf, flags);
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}
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}
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void mips_tcg_init(void)
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@ -7048,14 +7048,20 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
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}
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cpu_fprintf(f, " ] RES " TARGET_FMT_lx "\n",
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env->reserve_addr);
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for (i = 0; i < 32; i++) {
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if ((i & (RFPL - 1)) == 0)
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cpu_fprintf(f, "FPR%02d", i);
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cpu_fprintf(f, " %016" PRIx64, *((uint64_t *)&env->fpr[i]));
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if ((i & (RFPL - 1)) == (RFPL - 1))
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cpu_fprintf(f, "\n");
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if (flags & CPU_DUMP_FPU) {
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for (i = 0; i < 32; i++) {
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if ((i & (RFPL - 1)) == 0) {
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cpu_fprintf(f, "FPR%02d", i);
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}
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cpu_fprintf(f, " %016" PRIx64, *((uint64_t *)&env->fpr[i]));
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if ((i & (RFPL - 1)) == (RFPL - 1)) {
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cpu_fprintf(f, "\n");
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}
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}
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cpu_fprintf(f, "FPSCR " TARGET_FMT_lx "\n", env->fpscr);
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}
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cpu_fprintf(f, "FPSCR " TARGET_FMT_lx "\n", env->fpscr);
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#if !defined(CONFIG_USER_ONLY)
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cpu_fprintf(f, " SRR0 " TARGET_FMT_lx " SRR1 " TARGET_FMT_lx
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" PVR " TARGET_FMT_lx " VRSAVE " TARGET_FMT_lx "\n",
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@ -219,11 +219,13 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f,
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cpu_fprintf(f, "\n");
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}
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}
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for (i = 0; i < 32; i++) {
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cpu_fprintf(f, " %s %016" PRIx64,
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riscv_fpr_regnames[i], env->fpr[i]);
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if ((i & 3) == 3) {
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cpu_fprintf(f, "\n");
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if (flags & CPU_DUMP_FPU) {
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for (i = 0; i < 32; i++) {
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cpu_fprintf(f, " %s %016" PRIx64,
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riscv_fpr_regnames[i], env->fpr[i]);
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if ((i & 3) == 3) {
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cpu_fprintf(f, "\n");
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}
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}
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}
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}
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@ -327,21 +327,22 @@ void s390_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
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}
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}
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for (i = 0; i < 16; i++) {
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cpu_fprintf(f, "F%02d=%016" PRIx64, i, get_freg(env, i)->ll);
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if ((i % 4) == 3) {
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cpu_fprintf(f, "\n");
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if (flags & CPU_DUMP_FPU) {
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if (s390_has_feat(S390_FEAT_VECTOR)) {
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for (i = 0; i < 32; i++) {
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cpu_fprintf(f, "V%02d=%016" PRIx64 "%016" PRIx64 "%c",
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i, env->vregs[i][0].ll, env->vregs[i][1].ll,
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i % 2 ? '\n' : ' ');
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}
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} else {
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cpu_fprintf(f, " ");
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for (i = 0; i < 16; i++) {
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cpu_fprintf(f, "F%02d=%016" PRIx64 "%c",
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i, get_freg(env, i)->ll,
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(i % 4) == 3 ? '\n' : ' ');
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}
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}
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}
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for (i = 0; i < 32; i++) {
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cpu_fprintf(f, "V%02d=%016" PRIx64 "%016" PRIx64, i,
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env->vregs[i][0].ll, env->vregs[i][1].ll);
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cpu_fprintf(f, (i % 2) ? "\n" : " ");
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}
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#ifndef CONFIG_USER_ONLY
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for (i = 0; i < 16; i++) {
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cpu_fprintf(f, "C%02d=%016" PRIx64, i, env->cregs[i]);
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@ -647,15 +647,18 @@ void sparc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
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}
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}
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for (i = 0; i < TARGET_DPREGS; i++) {
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if ((i & 3) == 0) {
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cpu_fprintf(f, "%%f%02d: ", i * 2);
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}
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cpu_fprintf(f, " %016" PRIx64, env->fpr[i].ll);
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if ((i & 3) == 3) {
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cpu_fprintf(f, "\n");
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if (flags & CPU_DUMP_FPU) {
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for (i = 0; i < TARGET_DPREGS; i++) {
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if ((i & 3) == 0) {
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cpu_fprintf(f, "%%f%02d: ", i * 2);
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}
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cpu_fprintf(f, " %016" PRIx64, env->fpr[i].ll);
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if ((i & 3) == 3) {
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cpu_fprintf(f, "\n");
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}
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}
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}
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#ifdef TARGET_SPARC64
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cpu_fprintf(f, "pstate: %08x ccr: %02x (icc: ", env->pstate,
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(unsigned)cpu_get_ccr(env));
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@ -2101,7 +2101,9 @@ void uc32_cpu_dump_state(CPUState *cs, FILE *f,
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psr & (1 << 28) ? 'V' : '-',
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cpu_mode_names[psr & 0xf]);
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cpu_dump_state_ucf64(env, f, cpu_fprintf, flags);
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if (flags & CPU_DUMP_FPU) {
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cpu_dump_state_ucf64(env, f, cpu_fprintf, flags);
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}
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}
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void restore_state_to_opc(CPUUniCore32State *env, TranslationBlock *tb,
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@ -1243,7 +1243,8 @@ void xtensa_cpu_dump_state(CPUState *cs, FILE *f,
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}
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}
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if (xtensa_option_enabled(env->config, XTENSA_OPTION_FP_COPROCESSOR)) {
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if ((flags & CPU_DUMP_FPU) &&
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xtensa_option_enabled(env->config, XTENSA_OPTION_FP_COPROCESSOR)) {
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cpu_fprintf(f, "\n");
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for (i = 0; i < 16; ++i) {
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