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target/arm: Fix SMMLS argument order

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The previous simplification got the order of operands to the
subtraction wrong.  Since the 64-bit product is the subtrahend,
we must use a 64-bit subtract to properly compute the borrow
from the low-part of the product.

Fixes: 5f8cd06ebc ("target/arm: Simplify SMMLA, SMMLAR, SMMLS, SMMLSR")
Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Message-id: 20190829013258.16102-1-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2019-08-28 18:32:58 -07:00 committed by Peter Maydell
parent 3499ec086a
commit e0a0c8322b
1 changed files with 18 additions and 2 deletions
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20
target/arm/translate.c
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@ -8831,7 +8831,16 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
if (rd != 15) {
tmp3 = load_reg(s, rd);
if (insn & (1 << 6)) {
tcg_gen_sub_i32(tmp, tmp, tmp3);
/*
* For SMMLS, we need a 64-bit subtract.
* Borrow caused by a non-zero multiplicand
* lowpart, and the correct result lowpart
* for rounding.
*/
TCGv_i32 zero = tcg_const_i32(0);
tcg_gen_sub2_i32(tmp2, tmp, zero, tmp3,
tmp2, tmp);
tcg_temp_free_i32(zero);
} else {
tcg_gen_add_i32(tmp, tmp, tmp3);
}
@ -10075,7 +10084,14 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
if (insn & (1 << 20)) {
tcg_gen_add_i32(tmp, tmp, tmp3);
} else {
tcg_gen_sub_i32(tmp, tmp, tmp3);
/*
* For SMMLS, we need a 64-bit subtract.
* Borrow caused by a non-zero multiplicand lowpart,
* and the correct result lowpart for rounding.
*/
TCGv_i32 zero = tcg_const_i32(0);
tcg_gen_sub2_i32(tmp2, tmp, zero, tmp3, tmp2, tmp);
tcg_temp_free_i32(zero);
}
tcg_temp_free_i32(tmp3);
}